TY  - CHAP
U1  - Konferenzveröffentlichung
A1  - Rohleder, Alexander
A1  - Jäckel, Steffen
A1  - Sikora, Axel
T1  - Design and Test of a Gigabit Ethernet MAC for High-Speed HIL-Support
T2  - Tagungsband zum Workshop der Multiprojekt Chip-Gruppe Baden-Württemberg
N2  - The efficient support of Hardwae-In-theLoop (HIL) in the design process of hardwaresoftware-co-designed systems is an ongoing challenge. This paper presents a network-based integration of hardware elements into the softwarebased image processing tool „ADTF“, based on a high-performance Gigabit Ethernet MAC and a highly-efficient TCP/IP-stack. The MAC has been designed in VHDL. It was verified in a SystemCsimulation environment and tested on several Altera FPGAs.
Y1  - 2011
UR  - https://nbn-resolving.org/urn:nbn:de:bsz:ofb1-opus4-60252
SN  - 1682-9221
SS  - 1682-9221
VL  - 46
SP  - 35
EP  - 39
PB  - Hochschule Ulm
CY  - Ulm
ER  -