@inproceedings{JansenFawazBauetal.2007,
  author    = {Dirk Jansen and Nidal Fawaz and Daniel Bau and Marc Durrenberger},
  title     = {A Small High Performance Microprocessor Core Sirius for Embedded Low Power Designs, Demonstrated in a Medical Mass Application of an Electronic Pill (ePill®) in Embedded System Design Topic},
  series = {Embedded System Design: Topics, Techniques and Trends},
  editor    = {Achim Rettberger and Mauro C. Zanella and Rainer D{\"o}mer and Andreas Gerstlauer and Franz J. Rammig},
  publisher = {Springer},
  address   = {New York},
  isbn      = {978-0-387-72257-3 (Hardcover)},
  doi       = {10.1007/978-0-387-72258-0\_31},
  pages     = {363 -- 372},
  year      = {2007},
  abstract  = {A new, small, and optimized for low power processor core named SIRIUS has been developed, simulated, synthesized to a netlist and verified. From this netlist, containing only primitives like gates and flip-flops, a mapping to an ASIC - or FPGA technology can easily be done with existing synthesizer tools, allowing very complex SOC designs with several blocks. Emulation via FPGA can be done on already simple setups and cheap hardware because of the small core size. The performance is estimated 50 MIPS on Cyclone II FPGA and about 100 MIPS on a 0.35 CMOS 5M2P technology with 4197 primitives used for the core, including a 16 x 16 multiplier. An example design of the ASIC for an electronic ePille device currently in development is shown.},
  language  = {en}
}