@inproceedings{ZellHochbergHaas, author = {Zell, Christiane and Hochberg, Ulrich and Haas, Katharina}, title = {Biologische Methanisierung mit Membranbegasung in Biogasanlagen}, series = {Tagungsband:Biogas-Innovationskongress DBU Osnabr{\"u}ck, 21.05.2019-22.05.2019}, editor = {Nelles, Michael}, publisher = {ProFair Consult+Project GmbH}, address = {Hildesheim}, organization = {Kongress-Beirat Biogas-Innovationskongress}, isbn = {978-3-947777-03-7}, url = {http://nbn-resolving.de/urn:nbn:de:bsz:ofb1-opus4-38090}, pages = {33 -- 42}, abstract = {Vorgestellt wird ein Konzept zur biologischen Methanisierung von Wasserstoff direkt in Biogasreaktoren, mit dem durch Membranbegasung der Methangehalt des Biogases auf > 96 \% erh{\"o}ht werden kann. Essentiell zum Erreichen solch hoher Methanwerte sind die Einhaltung eines optimalen pH-Bereichs und die Vermeidung von H2-Akkumulation. Im Falle einer Limitierung der Methanbildungsrate durch den eigentlichen anaeroben Abbauprozess der Biomasse ist auch eine externe Zufuhr von CO2 zur weiteren Methanbildung denkbar. Das Verfahren soll weiter optimiert und in einem von der Deutschen Bundesstiftung Umwelt gef{\"o}rderten Projekt in der Biogasanlage einer regionalen K{\"a}serei in der Praxis getestet werden. Die hier angestrebte Kombination aus dezentraler Abfallverwertung und Eigenenergieerzeugung eines lebensmittelverarbeitenden Betriebs unter Einbindung in ein intelligentes Erneuerbare Energien - Konzept soll einen zus{\"a}tzlichen Mehrwert liefern.}, language = {de} } @misc{TajanWesthoffArmknecht2019, author = {Tajan, Louis and Westhoff, Dirk and Armknecht, Frederik}, title = {Private Set Relations with Bloom Filters for Outsourced SLA Validation}, series = {IACR Cryptology ePrint Archive 2019: 993 (2019)}, pages = {1 -- 29}, year = {2019}, abstract = {In the area of cloud computing, judging the fulfillment of service-level agreements on a technical level is gaining more and more importance. To support this we introduce privacy preserving set relations as inclusiveness and disjointness based ao Bloom filters. We propose to compose them in a slightly different way by applying a keyed hash function. Besides discussing the correctness of set relations, we analyze how this impacts the privacy of the sets content as well as providing privacy on the sets cardinality. Indeed, our solution proposes to bring another layer of privacy on the sizes. We are in particular interested how the overlapping bits of a Bloom filter impact the privacy level of our approach. We concretely apply our solution to a use case of cloud security audit on access control and present our results with real-world parameters.}, language = {en} } @inproceedings{TajanWesthoff, author = {Tajan, Louis and Westhoff, Dirk}, title = {Retrospective Tracking of Suspects in GDPR Conform Mobile Access Networks Datasets}, series = {CECC 2019: Proceedings of the Third Central European Cybersecurity Conference, November 2019}, number = {Article No.: 16}, publisher = {ACM}, address = {New York}, isbn = {978-1-4503-7296-1}, doi = {10.1145/3360664.3360680}, pages = {1 -- 6}, abstract = {This work discusses several use cases of post-mortem mobile device tracking in which privacy is required e.g. due to client-confidentiality agreements and sensibility of data from government agencies as well as mobile telecommunication providers. We argue that our proposed Bloomfilter based privacy approach is a valuable technical building block for the arising General Data Protection Regulation (GDPR) requirements in this area. In short, we apply a solution based on the Bloom filters data structure that allows a 3rd party to performsome privacy saving setrelations on a mobiletelco's access logfile or other mobile access logfile from harvesting parties without revealing any other mobile users in the proximity of a mobile base station but still allowing to track perpetrators.}, language = {en} } @article{LauerDattaKauretal., author = {Lauer, Tobias and Datta, Amitava and Kaur, Amardeep and Chabbouh, Sami}, title = {Exploiting Multi-Core and Many-Core Parallelism for Subspace Clustering}, series = {International Journal of Applied Mathematics and Computer Science}, volume = {29}, number = {1}, address = {Zielona G{\´o}ra}, organization = {University of Zielona G{\´o}ra}, issn = {2083-8492 (Online)}, doi = {10.2478/amcs-2019-0006}, pages = {81 -- 91}, abstract = {Finding clusters in high dimensional data is a challenging research problem. Subspace clustering algorithms aim to find clusters in all possible subspaces of the dataset, where a subspace is a subset of dimensions of the data. But the exponential increase in the number of subspaces with the dimensionality of data renders most of the algorithms inefficient as well as ineffective. Moreover, these algorithms have ingrained data dependency in the clustering process, which means that parallelization becomes difficult and inefficient. SUBSCALE is a recent subspace clustering algorithm which is scalable with the dimensions and contains independent processing steps which can be exploited through parallelism. In this paper, we aim to leverage the computational power of widely available multi-core processors to improve the runtime performance of the SUBSCALE algorithm. The experimental evaluation shows linear speedup. Moreover, we develop an approach using graphics processing units (GPUs) for fine-grained data parallelism to accelerate the computation further. First tests of the GPU implementation show very promising results.}, language = {en} } @article{WellerHefenbrockGolanbarietal., author = {Weller, Dennis D. and Hefenbrock, Michael and Golanbari, Mohammad Saber and Beigl, Michael and Aghassi-Hagmann, Jasmin and Tahoori, Mehdi Baradaran}, title = {Bayesian Optimized Mixture Importance Sampling for High-Sigma Failure Rate Estimation}, series = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, organization = {IEEE}, issn = {0278-0070 (Print)}, doi = {10.1109/TCAD.2019.2961321}, pages = {1 -- 11}, abstract = {In many application domains, in particular automotives, guaranteeing a very low failure rate is crucial to meet functional and safety standards. Especially, reliable operation of memory components such as SRAM cells is of essential importance. Due to aggressive technology downscaling, process and runtime variations significantly impact manufacturing yield as well as functionality. For this reason, a thorough memory failure rate assessment is imperative for correct circuit operation and yield improvement. In this regard, Monte Carlo simulations have been used as the conventional method to estimate the variability induced failure rate of memory components. However, Monte Carlo methods become infeasible when estimating rare events such as high-sigma failure rates. To this end, Importance Sampling methods have been proposed which reduce the number of required simulations substantially. However, existing methods still suffer from inaccuracies and high computational efforts, in particular for high-sigma problems. In this paper, we fill this gap by presenting an efficient mixture Importance Sampling approach based on Bayesian optimization, which deploys a surface model of the objective function to find the most probable failure points. Its advantages include constant complexity independent of the dimensions of design space, the potential to find the global extrema, and higher trustworthiness of the estimated failure rate by accurately exploring the design space. The approach is evaluated on a 6T-SRAM cell as well as a master-slave latch based on a 28nm FDSOI process. The results show an improvement in accuracy, resulting in up to 63× better accuracy in estimating failure rates compared to the best state-of-the-art solutions on a 28nm technology node.}, language = {en} } @article{CadilhaMarquesSukuramsyahArnalRusetal., author = {Cadilha Marques, Gabriel and Sukuramsyah, Adrianus Matthew and Arnal Rus, August and Bolat, Sami and Aribia, Abdessalem and Feng, Xiaowei and Singaraju, Surya Abhishek and Ramon, Eloi and Romanyuk, Yaroslav and Tahoori, Mehdi Baradaran and Aghassi-Hagmann, Jasmin}, title = {Fabrication and Modeling of pn-Diodes Based on Inkjet-Printed Oxide Semiconductors}, series = {IEEE Electron Device Letters}, volume = {41}, number = {1}, organization = {IEEE}, issn = {0741-3106 (Print)}, doi = {10.1109/LED.2019.2956346}, pages = {187 -- 190}, abstract = {Oxide semiconductors have the potential to increase the performance of inkjet printed microelectronic devices such as field-effect transistors (FETs), due to their high electron mobilities. Typical metal oxides are n-type semiconductors, while p-type oxides, although realizable, exhibit lower carriermobilities. Therefore, the circuit design based on oxide semiconductors is mostly in n-type logic only. Here we present an inkjet printed pn-diode based on p- and n-type oxide semiconductors.Copper oxide or nickel oxide is used as p-typesemiconductor whereas n-typesemiconductor is realized with indium oxide. Themeasurements show that the pn-diodes operate in the voltage window typical for printed electronics and the emission coefficient is 1.505 and 2.199 for the copper oxide based and nickel oxidebased pn-diode, respectively.Furthermore, a pn-diode model is developed and integrable into a circuit simulator.}, language = {en} } @article{NeuperChandreshSingarajuetal., author = {Neuper, Felix and Chandresh, Abhinav and Singaraju, Surya Abhishek and Aghassi-Hagmann, Jasmin and Hahn, Horst and Breitung, Ben}, title = {Tailoring Threshold Voltages of Printed Electrolyte-Gated Field-Effect Transistors by Chromium Doping of Indium Oxide Channels}, series = {ACS Omega}, volume = {4}, number = {24}, publisher = {ACS Publications}, address = {Washington DC}, organization = {American Chemical Society}, issn = {2470-1343}, doi = {10.1021/acsomega.9b02513}, pages = {20579 -- 20585}, abstract = {Printed systems spark immense interest in industry, and for several parts such as solar cells or radio frequency identification antennas, printed products are already available on the market. This has led to intense research; however, printed field-effect transistors (FETs) and logics derived thereof still have not been sufficiently developed to be adapted by industry. Among others, one of the reasons for this is the lack of control of the threshold voltage during production. In this work, we show an approach to adjust the threshold voltage (Vth) in printed electrolyte-gated FETs (EGFETs) with high accuracy by doping indium-oxide semiconducting channels with chromium. Despite high doping concentrations achieved by a wet chemical process during precursor ink preparation, good on/off-ratios of more than five orders of magnitude could be demonstrated. The synthesis process is simple, inexpensive, and easily scalable and leads to depletion-mode EGFETs, which are fully functional at operation potentials below 2 V and allows us to increase Vth by approximately 0.5 V.}, language = {en} } @article{SingarajuBabyNeuperetal., author = {Singaraju, Surya Abhishek and Baby, Tessy T. and Neuper, Felix and Kruk, Robert and Aghassi-Hagmann, Jasmin and Hahn, Horst and Breitung, Ben}, title = {Development of Fully Printed Oxide Field-Effect Transistors using Graphene Passive Structures}, series = {ACS Applied Electronic Materials}, volume = {1}, number = {8}, publisher = {ACS Publications}, address = {Washington DC}, organization = {American Chemical Society}, issn = {2637-6113}, doi = {10.1021/acsaelm.9b00313}, pages = {1538 -- 1544}, abstract = {During the past decade to the present time, the topic of printed electronics has gained a lot of attention for their potential use in a number of practical applications, including biosensors, photovoltaic devices, RFIDs, flexible displays, large-area circuits, and so on. To fully realize printed electronic components and devices, effective techniques for the printing of passive structures and electrically and chemically compatible materials in the printed devices need to be developed first. The opportunity of using electrically conducting graphene inks will enable the integration of passive structures into active devices, as for example, printed electrolyte-gated transistors (EGTs). Accordingly, in this study, we present the parametric results obtained on fully printed electrolyte-gated transistors having graphene as the passive electrodes, an inorganic oxide semiconductor as the active channel, and a composite solid polymer electrolyte (CSPE) as the gate insulating material. This configuration offers high chemical and electrical stability while at the same time allowing EGT operation at low potentials, implying the distinct advantage of operation at low input voltages. The printed in-plane EGTs we developed exhibit excellent performance with device mobility up to 16 cm2 V-1 s-1, an ION/IOFF ratio of 105, and a subthreshold slope of 120 mV dec-1.}, language = {en} } @article{ErozanHefenbrockBeigletal., author = {Erozan, Ahmet Turan and Hefenbrock, Michael and Beigl, Michael and Aghassi-Hagmann, Jasmin and Tahoori, Mehdi Baradaran}, title = {Reverse Engineering of Printed Electronics Circuits: From Imaging to Netlist Extraction}, series = {IEEE Transactions on Information Forensics and Security}, volume = {15}, publisher = {IEEE}, address = {New York}, organization = {IEEE Signal Processing Society}, issn = {1556-6013 (Print)}, doi = {10.1109/TIFS.2019.2922237}, pages = {475 -- 486}, abstract = {Printed electronics (PE) circuits have several advantages over silicon counterparts for the applications where mechanical flexibility, extremely low-cost, large area, and custom fabrication are required. The custom (personalized) fabrication is a key feature of this technology, enabling customization per application, even in small quantities due to low-cost printing compared with lithography. However, the personalized and on-demand fabrication, the non-standard circuit design, and the limited number of printing layers with larger geometries compared with traditional silicon chip manufacturing open doors for new and unique reverse engineering (RE) schemes for this technology. In this paper, we present a robust RE methodology based on supervised machine learning, starting from image acquisition all the way to netlist extraction. The results show that the proposed RE methodology can reverse engineer the PE circuits with very limited manual effort and is robust against non-standard circuit design, customized layouts, and high variations resulting from the inherent properties of PE manufacturing processes.}, language = {en} } @inproceedings{ErozanAghassiHagmannTahoori, author = {Erozan, Ahmet Turan and Aghassi-Hagmann, Jasmin and Tahoori, Mehdi Baradaran}, title = {Inkjet Printed True Random Number Generator based on Additive Resistor Tuning}, series = {Proceedings of the Design Automation and Test in Europe Conference and Exhibition, 25-29 March 2019, Florence, Italy}, organization = {IEEE}, isbn = {978-3-9819263-2-3 (Online)}, issn = {1558-1101 (Online)}, doi = {10.23919/DATE.2019.8715071}, pages = {1361 -- 1366}, abstract = {Printed electronics (PE) is a fast growing technology with promising applications in wearables, smart sensors and smart cards since it provides mechanical flexibility, low-cost, on-demand and customizable fabrication. To secure the operation of these applications, True Random Number Generators (TRNGs) are required to generate unpredictable bits for cryptographic functions and padding. However, since the additive fabrication process of PE circuits results in high intrinsic variation due to the random dispersion of the printed inks on the substrate, constructing a printed TRNG is challenging. In this paper, we exploit the additive customizable fabrication feature of inkjet printing to design a TRNG based on electrolyte-gated field effect transistors (EGFETs). The proposed memory-based TRNG circuit can operate at low voltages (≤ 1 V ), it is hence suitable for low-power applications. We also propose a flow which tunes the printed resistors of the TRNG circuit to mitigate the overall process variation of the TRNG so that the generated bits are mostly based on the random noise in the circuit, providing a true random behaviour. The results show that the overall process variation of the TRNGs is mitigated by 110 times, and the simulated TRNGs pass the National Institute of Standards and Technology Statistical Test Suite.}, language = {en} }