Design automation of digital circuits for partially depleted SOI-technology
- This paper shows that it is possible to adapt commercially available layout generators to the specific needs of partially depleted (PD)-SOI-technologies with minimal area penalty. Therefore, the requirements of SOI-specific layout techniques are investigated. A design flow for automatic layout generation is proposed. An implementation is presented with a cell library created with this generator.This paper shows that it is possible to adapt commercially available layout generators to the specific needs of partially depleted (PD)-SOI-technologies with minimal area penalty. Therefore, the requirements of SOI-specific layout techniques are investigated. A design flow for automatic layout generation is proposed. An implementation is presented with a cell library created with this generator. Measurements of test circuitry at temperatures up to 390 /spl deg/C and supply voltages up to 10 V are shown.…
| Document Type: | Conference Proceeding |
|---|---|
| Conference Type: | Konferenzartikel |
| Zitierlink: | https://opus.hs-offenburg.de/9168 | Bibliografische Angaben |
| Title (English): | Design automation of digital circuits for partially depleted SOI-technology |
| Conference: | IEEE International SOI Conference (September 30 - October 3, 1996 : Sanibel Island, Florida, USA) |
| Author: | Axel SikoraStaff MemberORCiDGND, Horst-Lothar Fiedler |
| Date of Publication (online): | 2002/08/06 |
| Publisher: | IEEE |
| First Page: | 108 |
| Last Page: | 109 |
| Parent Title (English): | 1996 IEEE International SOI Conference : Proceedings |
| Volume: | 96CH35937 |
| ISBN: | 0-7803-3315-2 |
| ISSN: | 1078-621X |
| DOI: | https://doi.org/10.1109/SOI.1996.552517 |
| Language: | English | Inhaltliche Informationen |
| Institutes: | Veröffentlichungen außerhalb der Hochschulzeit | Formale Angaben |
| Open Access: | Closed |
| Licence (German): |  Urheberrechtlich geschützt |