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Bei bimodaler Cochlea-Implantat-/Hörgerät-Versorgung kann es aufgrund seitenverschiedener Signalverarbeitung zu einer zeitlich versetzten Stimulation der beiden Modalitäten kommen. Jüngste Studien haben gezeigt, dass durch zeitlichen Abgleich der Modalitäten die Schalllokalisation bei bimodaler Versorgung verbessert werden kann. Um solch einen Abgleich vornehmen zu können, ist die messtechnische Bestimmung der Durchlaufzeit von Hörgeräten erforderlich. Kommerziell verfügbare Hörgerätemessboxen können diese Werte häufig liefern. Die dazu verwendete Signalverarbeitung wird dabei aber oft nicht vollständig offengelegt. In dieser Arbeit wird ein alternativer und nachvollziehbarer Ansatz zum Design eines simplen Messaufbaus basierend auf einem Arduino DUE Mikrocontroller-Board vorgestellt. Hierzu wurde ein Messtisch im 3D-Druck gefertigt, auf welchem Hörgeräte über einen 2-ccm-Kuppler an ein Messmikrofon angeschlossen werden können. Über einen Latenzvergleich mit dem simultan erfassten Signal eines Referenzmikrofons kann die Durchlaufzeit von Hörgeräten bestimmt werden. Frequenzspezifische Durchlaufzeiten werden mittels einer Kreuzkorrelation zwischen Ziel- und Referenzsignal errechnet. Aufnahme, Ausgabe und Speicherung der Signale erfolgt über einen ATMEL SAM3X8E Mikrocontroller, welcher auf dem Arduino DUE-Board verbaut ist. Über eigens entworfene elektronische Schaltungen werden die Mikrofone und der verwendete Lautsprecher angesteuert. Nach Abschluss einer Messung (Messdauer ca. 5 s) werden die Messdaten seriell an einen PC übertragen, auf dem die Datenauswertung mittels MATLAB erfolgt. Erste Validierungen zeigten eine hohe Stabilität der Messergebnisse mit sehr geringen Standardabweichungen im Bereich weniger Mikrosekunden für Pegel zwischen 50 und 75 dB (A). Der Messaufbau wird in laufenden Studien zur Quantifizierung der Durchlaufzeit von Hörgeräten verwendet.
Experimental Investigation of the Air Exchange Effectiveness of Push-Pull Ventilation Devices
(2020)
The increasing installation numbers of ventilation units in residential buildings are driven by legal objectives to improve their energy efficiency. The dimensioning of a ventilation system for nearly zero energy buildings is usually based on the air flow rate desired by the clients or requested by technical regulations. However, this does not necessarily lead to a system actually able to renew the air volume of the living space effectively. In recent years decentralised systems with an alternating operation mode and fairly good energy efficiencies entered the market and following question was raised: “Does this operation mode allow an efficient air renewal?” This question can be answered experimentally by performing a tracer gas analysis. In the presented study, a total of 15 preliminary tests are carried out in a climatic chamber representing a single room equipped with two push-pull devices. The tests include summer, winter and isothermal supply air conditions since this parameter variation is missing till now for push-pull devices. Further investigations are dedicated to the effect of thermal convection due to human heat dissipation on the room air flow. In dependence on these boundary conditions, the determined air exchange efficiency varies, lagging behind the expected range 0.5 < εa < 1 in almost all cases, indicating insufficient air exchange including short-circuiting. Local air exchange values suggest inhomogeneous air renewal depending on the distance to the indoor apertures as well as the temperature gradients between in- and outdoor. The tested measurement set-up is applicable for field measurements.
Background: This paper presents a novel approach for a hand prosthesis consisting of a flexible, anthropomorphic, 3D-printed replacement hand combined with a commercially available motorized orthosis that allows gripping.
Methods: A 3D light scanner was used to produce a personalized replacement hand. The wrist of the replacement hand was printed of rigid material; the rest of the hand was printed of flexible material. A standard arm liner was used to enable the user’s arm stump to be connected to the replacement hand. With computer-aided design, two different concepts were developed for the scanned hand model: In the first concept, the replacement hand was attached to the arm liner with a screw. The second concept involved attaching with a commercially available fastening system; furthermore, a skeleton was designed that was located within the flexible part of the replacement hand.
Results: 3D-multi-material printing of the two different hands was unproblematic and inexpensive. The printed hands had approximately the weight of the real hand. When testing the replacement hands with the orthosis it was possible to prove a convincing everyday functionality. For example, it was possible to grip and lift a 1-L water bottle. In addition, a pen could be held, making writing possible.
Conclusions: This first proof-of-concept study encourages further testing with users.
Fast charging of lithium-ion batteries remains one of the most delicate challenges for the automotive industry, being seriously affected by the formation of lithium metal in the negative electrode. Here we present a physicochemical pseudo-3D model that explicitly includes the plating reaction as side reaction running in parallel to the main intercalation reaction. The thermodynamics of the plating reaction are modeled depending on temperature and ion concentration, which differs from the often-used assumption of a constant plating condition of 0 V anode potential. The reaction kinetics are described with an Arrhenius-type rate law parameterized from an extensive literature research. Re-intercalation of plated lithium was modeled to take place either via reverse plating (solution-mediated) or via an explicit interfacial reaction (surface-mediated). At low temperatures not only the main processes (intercalation and solid-state diffusion) become slow, but also the plating reaction itself becomes slower. Using this model, we are able to predict typical macroscopic experimental observables that are indicative of plating, that is, a voltage plateau during discharge and a voltage drop upon temperature increase. A spatiotemporal analysis of the internal cell states allows a quantitative insight into the competition between intercalation and plating. Finally, we calculate operation maps over a wide range of C-rates and temperatures that allow to assess plating propensity as function of operating condition.
Prediction of Claims in Export Credit Finance: A Comparison of Four Machine Learning Techniques
(2020)
This study evaluates four machine learning (ML) techniques (Decision Trees (DT), Random Forests (RF), Neural Networks (NN) and Probabilistic Neural Networks (PNN)) on their ability to accurately predict export credit insurance claims. Additionally, we compare the performance of the ML techniques against a simple benchmark (BM) heuristic. The analysis is based on the utilisation of a dataset provided by the Berne Union, which is the most comprehensive collection of export credit insurance data and has been used in only two scientific studies so far. All ML techniques performed relatively well in predicting whether or not claims would be incurred, and, with limitations, in predicting the order of magnitude of the claims. No satisfactory results were achieved predicting actual claim ratios. RF performed significantly better than DT, NN and PNN against all prediction tasks, and most reliably carried their validation performance forward to test performance.
Electrolyte-gated thin-film transistors (EGTs) with indium oxide channel, and expected lifetime of three months, enable low-voltage operation (~1 V) in the field of printed electronics (PEs). The channel width of our printed EGTs is varied between 200 and 1000 μm, whereas a channel length between 10 and 100 μm is used. Due to the lack of uniform performance p-type metal oxide semiconductors, n-type EGTs and passive elements are used to design circuits. For logic gates, transistor-resistor logic has been employed so far, but depletion and enhancement-mode EGTs in a transistor-transistor logic boost the circuit performance in terms of delay and signal swing. In this article, the threshold voltage of the EGT, which determines the operation mode, is tuned through sizing of the EGTs channel geometry. The feasibility of both transistor operation modes is demonstrated for logic gates and ring oscillators. An inverter operating at a supply voltage of 1 V shows a maximum gain of 9.6 and a propagation delay time of 0.7 ms, which represents an improvement of ~ 2x for the gain and oscillation frequency, in comparison with the resistor-transistor logic design. Moreover, the power consumption is reduced by 6x.
Oxide semiconductors have the potential to increase the performance of inkjet printed microelectronic devices such as field-effect transistors (FETs), due to their high electron mobilities. Typical metal oxides are n-type semiconductors, while p-type oxides, although realizable, exhibit lower carriermobilities. Therefore, the circuit design based on oxide semiconductors is mostly in n-type logic only. Here we present an inkjet printed pn-diode based on p- and n-type oxide semiconductors.Copper oxide or nickel oxide is used as p-typesemiconductor whereas n-typesemiconductor is realized with indium oxide. Themeasurements show that the pn-diodes operate in the voltage window typical for printed electronics and the emission coefficient is 1.505 and 2.199 for the copper oxide based and nickel oxidebased pn-diode, respectively.Furthermore, a pn-diode model is developed and integrable into a circuit simulator.
Printed electronics (PE) is a fast-growing field with promising applications in wearables, smart sensors, and smart cards, since it provides mechanical flexibility, and low-cost, on-demand, and customizable fabrication. To secure the operation of these applications, true random number generators (TRNGs) are required to generate unpredictable bits for cryptographic functions and padding. However, since the additive fabrication process of the PE circuits results in high intrinsic variations due to the random dispersion of the printed inks on the substrate, constructing a printed TRNG is challenging. In this article, we exploit the additive customizable fabrication feature of inkjet printing to design a TRNG based on electrolyte-gated field-effect transistors (EGFETs). We also propose a printed resistor tuning flow for the TRNG circuit to mitigate the overall process variation of the TRNG so that the generated bits are mostly based on the random noise in the circuit, providing a true random behavior. The simulation results show that the overall process variation of the TRNGs is mitigated by 110 times, and the generated bitstream of the tuned TRNGs passes the National Institute of Standards and Technology - Statistical Test Suite. For the proof of concept, the proposed TRNG circuit was fabricated and tuned. The characterization results of the tuned TRNGs prove that the TRNGs generate random bitstreams at the supply voltage of down to 0.5 V. Hence, the proposed TRNG design is suitable to secure low-power applications in this domain.
Printed electronics (PE) enables disruptive applications in wearables, smart sensors, and healthcare since it provides mechanical flexibility, low cost, and on-demand fabrication. The progress in PE raises trust issues in the supply chain and vulnerability to reverse engineering (RE) attacks. Recently, RE attacks on PE circuits have been successfully performed, pointing out the need for countermeasures against RE, such as camouflaging. In this article, we propose a printed camouflaged logic cell that can be inserted into PE circuits to thwart RE. The proposed cell is based on three components achieved by changing the fabrication process that exploits the additive manufacturing feature of PE. These components are optically look-alike, while their electrical behaviors are different, functioning as a transistor, short, and open. The properties of the proposed cell and standard PE cells are compared in terms of voltage swing, delay, power consumption, and area. Moreover, the proposed camouflaged cell is fabricated and characterized to prove its functionality. Furthermore, numerous camouflaged components are fabricated, and their (in)distinguishability is assessed to validate their optical similarities based on the recent RE attacks on PE. The results show that the proposed cell is a promising candidate to be utilized in camouflaging PE circuits with negligible overhead.
Advances in printed electronics (PE) enables new applications, particularly in ultra-low-cost domains. However, achieving high-throughput printing processes and manufacturing yield is one of the major challenges in the large-scale integration of PE technology. In this article, we present a programmable printed circuit based on an efficient printed lookup table (pLUT) to address these challenges by combining the advantages of the high-throughput advanced printing and maskless point-of-use final configuration printing. We propose a novel pLUT design which is more efficient in PE realization compared to existing LUT designs. The proposed pLUT design is simulated, fabricated, and programmed as different logic functions with inkjet printed conductive ink to prove that it can realize digital circuit functionality with the use of programmability features. The measurements show that the fabricated LUT design is operable at 1 V.