Refine
Document Type
- Doctoral Thesis (31) (remove)
Is part of the Bibliography
- yes (31)
Keywords
- Finite-Elemente-Methode (2)
- Implantat (2)
- Materialermüdung (2)
- Simulation (2)
- Ablationstherapie (1)
- Adaptive Steuerung (1)
- Algotithmus (1)
- Aluminiumgusslegierung (1)
- Aluminiumlegierung (1)
- Batterie (1)
Institute
- Fakultät Elektrotechnik, Medizintechnik und Informatik (EMI) (ab 04/2019) (12)
- Fakultät Maschinenbau und Verfahrenstechnik (M+V) (5)
- Fakultät Wirtschaft (W) (4)
- INES - Institut für nachhaltige Energiesysteme (4)
- Fakultät Medien und Informationswesen (M+I) (bis 21.04.2021) (3)
- ivESK - Institut für verlässliche Embedded Systems und Kommunikationselektronik (2)
- Fakultät Elektrotechnik und Informationstechnik (E+I) (bis 03/2019) (1)
- Fakultät Medien (M) (ab 22.04.2021) (1)
- IMLA - Institute for Machine Learning and Analytics (1)
- POIM - Peter Osypka Institute of Medical Engineering (1)
Open Access
- Open Access (21)
- Diamond (5)
- Bronze (4)
- Closed Access (4)
- Closed (3)
With the expansion of IoT devices in many aspects of our life, the security of such systems has become an important challenge. Unlike conventional computer systems, any IoT security solution should consider the constraints of these systems such as computational capability, memory, connectivity, and power consumption limitations. Physical Unclonable Functions (PUFs) with their special characteristics were introduced to satisfy the security needs while respecting the mentioned constraints. They exploit the uncontrollable and reproducible variations of the underlying component for security applications such as identification, authentication, and communication security. Since IoT devices are typically low cost, it is important to reuse existing elements in their hardware (for instance sensors, ADCs, etc.) instead of adding extra costs for the PUF hardware. Micro-electromechanical system (MEMS) devices are widely used in IoT systems as sensors and actuators. In this thesis, a comprehensive study of the potential application of MEMS devices as PUF primitives is provided. MEMS PUF leverages the uncontrollable variations in the parameters of MEMS elements to derive secure keys for cryptographic applications. Experimental and simulation results show that our proposed MEMS PUFs are capable of generating enough entropy for a complex key generation, while their responses show low fluctuations in different environmental conditions.
Keeping in mind that the PUF responses are prone to change in the presence of noise and environmental variations, it is critical to derive reliable keys from the PUF and to use the maximum entropy at the same time. In the second part of this thesis, we elaborate on different key generation schemes and their advantages and drawbacks. We propose the PUF output positioning (POP) and integer linear programming (ILP) methods, which are novel methods for grouping the PUF outputs in order to maximize the extracted entropy. To implement these methods, the key enrollment and key generation algorithms are presented. The proposed methods are then evaluated by applying on the responses of the MEMS PUF, where it can be practically shown that the proposed method outperforms other existing PUF key generation methods.
The final part of this thesis is dedicated to the application of the MEMS PUF as a security solution for IoT systems. We select the mutual authentication of IoT devices and their backend system, and propose two lightweight authentication protocols based on MEMS PUFs. The presented protocols undergo a comprehensive security analysis to show their eligibility to be used in IoT systems. As the result, the output of this thesis is a lightweight security solution based on MEMS PUFs, which introduces a very low overhead on the cost of the hardware.
The evolution of cellular networks from its first generation (1G) to its fourth generation (4G) was driven by the demand of user-centric downlink capacity also technically called Mobile Broad-Band (MBB). With its fifth generation (5G), Machine Type Communication (MTC) has been added into the target use cases and the upcoming generation of cellular networks is expected to support them. However, such support requires improvements in the existing technologies in terms of latency, reliability, energy efficiency, data rate, scalability, and capacity.
Originally, MTC was designed for low-bandwidth high-latency applications such as, environmental sensing, smart dustbin, etc. Nowadays there is an additional demand around applications with low-latency requirements. Among other well-known challenges for recent cellular networks such as data rate energy efficiency, reliability etc., latency is also not suitable for mission-critical applications such as real-time control of machines, autonomous driving, tactile Internet etc. Therefore, in the currently deployed cellular networks, there is a necessity to reduce the latency and increase the reliability offered by the networks to support use cases such as, cooperative autonomous driving or factory automation, that are grouped under the denomination Ultra-Reliable Low-Latency Communication (URLLC).
This thesis is primarily concerned with the latency into the Universal Terrestrial Radio Access Network (UTRAN) of cellular networks. The overall work is divided into five parts. The first part presents the state of the art for cellular networks. The second part contains a detailed overview of URLLC use cases and the requirements that must be fulfilled by the cellular networks to support them. The work in this thesis is done as part of a collaboration project between IRIMAS lab in Université de Haute-Alsace, France and Institute for Reliable Embedded Systems and Communication Electronics (ivESK) in Offenburg University of Applied Sciences, Germany. The selected use cases of URLLC are part of the research interests of both partner institutes. The third part presents a detailed study and evaluation of user- and control-plane latency mechanisms in current generation of cellular networks. The evaluation and analysis of these latencies, performed with the open-source ns-3 simulator, were conducted by exploring a broad range of parameters that include among others, traffic models, channel access parameters, realistic propagation models, and a broad set of cellular network protocol stack parameters. These simulations were performed with low-power, low-cost, and wide-range devices, commonly called IoT devices, and standardized for cellular networks. These devices use either LTE-M or Narrowband-IoT (NB-IoT) technologies that are designed for connected things. They differ mainly by the provided bandwidth and other additional characteristics such as coding scheme, device complexity, and so on.
The fourth part of this thesis shows a study, an implementation, and an evaluation of latency reduction techniques that target the different layers of the currently used Long Term Evolution (LTE) network protocol stack. These techniques based on Transmission Time Interval (TTI) reduction and Semi-Persistent Scheduling (SPS) methods are implemented into the ns-3 simulator and are evaluated through realistic simulations performed for a variety of low-latency use cases focused on industry automation and vehicular networking. For testing the proposed latency reduction techniques in cellular networks, since ns-3 does not support NB-IoT in its current release, an NB-IoT extension for LTE module was developed. This makes it possible to explore deployment limitations and issues.
In the last part of this thesis, a flexible deployment framework called Hybrid Scheduling and Flexible TTI for the proposed latency reduction techniques is presented, implemented and evaluated through realistic simulations. With help of the simulation evaluation, it is shown that the improved LTE network proposed and implemented in the simulator can support low-latency applications with low cost, higher range, and narrow bandwidth devices. The work in this thesis points out the potential improvement techniques, their deployment issues and paves the way towards the support for URLLC applications with upcoming cellular networks.
When people with hearing loss are provided with different devices in each ear, these devices usually have different processing latencies. This leads to static temporal offsets between both ears in the order of several milliseconds. This thesis measured effects of such offsets in stimulation timing on mechanisms of binaural hearing, such as sound localization and speech understanding in noise in hearing-impaired and normal-hearing listeners.
Ultra-low-power passive telemetry systems for industrial and biomedical applications have gained much popularity lately. The reduction of the power consumption and size of the circuits poses critical challenges in ultra-low-power circuit design. Biotelemetry applications like leakage detection in silicone breast implants require low-power-consuming small-size electronics. In this doctoral thesis, the design, simulation, and measurement of a programmable mixed-signal System-on-Chip (SoC) called General Application Passive Sensor Integrated Circuit (GAPSIC) is presented. Owing to the low power consumption, GAPSIC is capable of completely passive operation. Such a batteryless passive system has lower maintenance complexity and is also free from battery-related health hazards. With a die area of 4.92 mm² and a maximum analog power consumption of 592 µW, GAPSIC has one of the best figure-of-merits compared to similar state-of-the-art SoCs. Regarding possible applications, GAPSIC can read out and digitally transmit the signals of resistive sensors for pressure or temperature measurements. Additionally, GAPSIC can measure electrocardiogram (ECG) signals and conductivity.
The design of GAPSIC complies with the International Organization for Standardization (ISO) 15693/NFC (near field communication) 5 standard for radio frequency identification (RFID), corresponding to the frequency range of 13.56 MHz. A passive transponder developed with GAPSIC comprises of an external memory storage and very few other external components, like an antenna and sensors. The passive tag antenna and reader antenna use inductive coupling for communication and energy transfer, which enables passive operation. A passive tag developed with GAPSIC can communicate with an NFC compatible smart device or an ISO 15693 RFID reader. An external memory storage contains the programmable application-specific firmware.
As a mixed-signal SoC, GAPSIC includes both analog and digital circuitries. The analog block of GAPSIC includes a power management unit, an RFID/NFC communication unit, and a sensor readout unit. The digital block includes an integrated 32-bit microcontroller, developed by the Hochschule Offenburg ASIC design center, and digital peripherals. A 16-kilobyte random-access memory and a read-only 16-kilobyte memory constitute the GAPSIC internal memory. For the fabrication of GAPSIC, one poly, six-metal 0.18 µm CMOS process is used.
The design of GAPSIC includes two stages. In the first stage, a standalone RFID/NFC frontend chip with a power management unit, an RFID/NFC communication unit, a clock regenerator unit, and a field detector unit was designed. In the second stage, the rest of the functional blocks were integrated with the blocks of the RFID/NFC frontend chip for the final integration of GAPSIC. To reduce the power consumption, conventional low-power design techniques were applied extensively like multiple power supplies, and the operation of complementary metal-oxide-semiconductor (CMOS) transistors in the sub-threshold region of operation, as well as further innovative circuit designs.
An overvoltage protection circuit, a power rectifier, a bandgap reference circuit, and two low-dropout (LDO) voltage regulators constitute the power management unit of GAPSIC. The overvoltage protection circuit uses a novel method where three stacked transistor pairs shunt the extra voltage. In the power rectifier, four rectifier units are arranged in parallel, which is a unique approach. The four parallel rectifier units provide the optimal choice in terms of voltage drop and the area required.
The communication unit is responsible for RFID/NFC communication and incorporates demodulation and load modulation circuitry. The demodulator circuit comprises of an envelope detector, a high-pass filter, and a comparator. Following a new approach, the bandgap reference circuit itself acts as the load for the envelope detector circuit, which minimizes the circuit complexity and area. For the communication between the reader and the RFID/NFC tag, amplitude-shift keying (ASK) is used to modulate signals, where the smallest modulation index can be as low as 10%. A novel technique involving a comparator with a preset offset voltage effectively demodulates the ASK signal. With an effective die area of 0.7 mm² and power consumption of 107 µW, the standalone RFID/NFC frontend chip has the best figure-of-merits compared to the state-of-the-art frontend chips reported in the relevant literature. A passive RFID/NFC tag developed with the standalone frontend chip, as well as temperature and pressure sensors demonstrate the full passive operational capability of the frontend chip. An NFC reader device using a custom-built Android-based application software reads out the sensor data from the passive tag.
The sensor readout circuit consists of a channel selector with two differential and four single-ended inputs with a programmable-gain instrumentation amplifier. The entire sensor readout part remains deactivated when not in use. The internal memory stores the measured offset voltage of the instrumentation amplifier, where a firmware code removes the offset voltage from the measured sensor signal. A 12-bit successive approximation register (SAR) type analog-to-digital-converter (ADC) based on a charge redistribution architecture converts the measured sensor data to a digital value. The digital peripherals include a serial peripheral interface, four timers, RFID/NFC interfaces, sensor readout unit interfaces, and 12-bit SAR logic.
Two sets of studies with custom-made NFC tag antennas for biomedical applications were conducted to ascertain their compatibility with GAPSIC. The first study involved the link efficiency measurements of NFC tag antennas and an NFC reader antenna with porcine tissue. In a separate experiment, the effect of a ferrite compared to air core on the antenna-coupling factor was investigated. With the ferrite core, the coupling factor increased by four times.
Among the state-of-the-art SoCs published in recent scientific articles, GAPSIC is the only passive programmable SoC with a power management unit, an RFID/NFC communication interface, a sensor readout circuit, a 12-bit SAR ADC, and an integrated 32-bit microcontroller. This doctoral research includes the preliminary study of three passive RFID tags designed with discrete components for biomedical and industrial applications like measurements of temperature, pH, conductivity, and oxygen concentration, along with leakage detection in silicone breast implants. Besides its small size and low power consumption, GAPSIC is suitable for each of the biomedical and industrial applications mentioned above due to the integrated high-performance microcontroller, the robust programmable instrumentation amplifier, and the 12-bit analog-to-digital converter. Furthermore, the simulation and measurement data show that GAPSIC is well suited for the design of a passive tag to monitor arterial blood pressure in patients experiencing Peripheral Artery Disease (PAD), which is proposed in this doctoral thesis as an exemplary application of the developed system.
A report from the World Economic Forum (2019) stated loneliness as the third societal stressor in the world, mainly in western countries. Moreover, research shows that loneliness tends to be experienced more severely by young adults than other age groups (Rokach, 2000), which is the case of university students who face profound periods of loneliness when attending university in a new place (Diehl et al., 2018). Digital technology, especially mental health apps (MHapps), have been viewed as promising solutions to address this distress in universities, however, little evidence on this topic reveals uncertainty around how these resources impact individual well-being. Therefore, this research proposed to investigate how the gamified social mobile app Noneliness reduced loneliness rates and other associated mental health issues of students from a German university. As little work has focused on digital apps targeting loneliness, this project also proposed to describe and discuss the app’s design and development processes. A multimethod approach was adopted: literature review on high-efficacy MHapps design, gamification for mental health and loneliness interventions; User Experience Design and Human-centered Computing. Evaluations occurred according to the app’s development iterations, which assessed four versions (from prototype to Beta) through quantitative and qualitative studies with university students. The main results obtained regarding the design aspects were: users' preference for minimalistic interfaces; importance in maintaining privacy and establishing trust among users; students' willingness to use an online support space for emotional and educational support. Most used features were those related to group discussions, private chats and university social events. Preferred gamification elements were those that provided positive reinforcement to motivate social interactions (e.g. Points, Levels and Achievements). Results of a pilot randomized controlled trial with university students (N = 12), showed no statistically significant interactions in reducing loneliness among experimental group members (n = 7, x² = 3.500, p-value = 0.477, Cramer’s V = 0.27) who made continued use of the app for six weeks. On the other hand, the app showed effects of moderate magnitude on loneliness reduction in this group. The app also demonstrated relatively strong magnitude effects on other associated variables, such as depression and stress in the experimental group. In addition to motivating the conduct of further studies with larger samples, the findings point to a potential app effectiveness not only to reduce loneliness, but also other variables that may be associated with the distress.
Herzfehler sind weltweit die häufigste Form von angeborenen Organdefekten. In unterschiedlichen Studien wird die Inzidenz zumeist zwischen vier und elf von 1.000 Lebendgeburten angegeben (1–5). Im Rahmen der multizentrischen PAN-Studie (PAN: Prävalenz angeborener Herzfehler bei Neugeborenen), welche die Häufigkeit angeborener Herzfehler bei Neugeborenen in Deutschland zwischen Juli 2006 und Juni 2007 untersuchte, ergab sich eine Gesamtprävalenz von 107,6 pro 10.000 Lebendgeburten. Gegenstand dieser Arbeit sind Untersuchungen an Implantaten zur Behandlung von Atriumseptumdefekten (ASD). Vorhofseptumdefekte machen mit 17,0%, nach den Ventrikelseptumdefekten (VSD) mit 48,9%die zweithäufigste Art von Herzfehlern aus (6, 7).Als Vorhofseptumdefekte werden Öffnungen in der Scheidewand zwischen den Herzvorhöfen bezeichnet. Bei der Therapie eines ASD ist der minimalinvasive Verschluss mittels sogenannter Okkluder heute das Mittel der Wahl. Diese werden über einen femoralen Zugang im Rahmen einer Herzkatheteruntersuchung unter Ultraschallkontrolle und Durchleuchtung an die Implantationsstelle vorgeschoben und dort platziert(8). Die Okkluder bestehen in der Regel aus einem Drahtgeflecht aus Nitinol und haben die typische Form eines sogenannten Doppelschirmchens. Dabei weichen die unterschiedlichen Okkluder der einzelnen Firmen hinsichtlich Form und Beschaffenheit oft erheblich voneinander ab. Derzeit gibt es keine Untersuchungsmethode, die die auf dem Markt befindlichen Okkluder hinsichtlich ihrer mechanischen Eigenschaften vergleichbar macht. Diese Arbeit solleinen Beitrag erbringen, um grundlegende, die Okkludermodelle charakterisierende Parameter zu schaffen, um so deren interindividuelle Vergleichbarkeit zu ermöglichen. Hierzu werden in-vitro Messungen durchgeführt, welche geeignet sind das Verhalten der untersuchten Modelle unter unterschiedlichen Bedingungen und bei variierenden Defektgrößen zu charakterisieren.
Lithium-ion batteries play a vital role in a society more and more affected by the spectre of climate change: hence the need of lowering CO2 emissions and reducing the fossil fuel consumption. At the moment, lithium-ion batteries appear as the ideal candidates for this challenge but further research and development is required to understand their behaviour, predict their issues and therefore improve their performance. In this regard, mathematical modelling and numerical simulation have become standard techniques in lithium-ion battery research and development and have proven to be highly useful in supporting experimental work and increasing the predictability of model-based life expectancy.
This study focuses on the electrochemical ageing reactions at the anode, especially on the topic of lithium plating and its interaction with the solid electrolyte interface (SEI). The purpose of this work is a deeper understanding of these degradation processes through the construction of refined modelling frameworks and the analysis of simulations carried out over a wide range of operating conditions. The governing equations are implemented in the in-house multiphysics software package DENIS, while the electrochemistry model is based on the use of the open-source chemical kinetics code CANTERA.
The development, parameterisation and experimental validation of a comprehensive pseudo-three-dimensional multiphysics model of a commercial lithium-ion cell with blend cathode and graphite anode is presented. This model is able to describe and simulate both multiscale heat and mass transport and complex electrochemical reaction mechanisms, including also as extra feature the capability of reproducing a composite electrode where multiple active materials are subject to intercalation/deintercalation reaction.
A further extension to include reversible lithium plating process and predict ageing behaviour over a wide range of conditions, with a focus on the high currents and low temperatures particularly interesting for the fast charging topic, follows. This extended model is verified by comparison with published experimental data showing voltage plateau and voltage drop as plating indicators and optionally includes an explicit re-intercalation reaction that is shown to suppress macroscopic plating hints in the specific case of a cell not showing evident plating signs. This model is used to create degradation maps over a wide range of conditions and an in-depth spatiotemporal analysis of the anode behaviour at the mesoscopic and microscopic scales, demonstrating the dynamic and nonlinear interaction between the intercalation and plating reactions.
A deeper outlook on the SEI formation and growth is presented, together with the qualitative description of three different 1D-models with a decreasing level of detail, developed with the purpose of ideally being included in future in more comprehensive multiscale frameworks.
Finally, the extended model is successfully coupled with a previously developed SEI model to result in an original modelling framework able to simulate both degradation processes and their continuous positive feedback.
Due to its performance, the field of deep learning has gained a lot of attention, with neural networks succeeding in areas like Computer Vision (CV), Neural Language Processing (NLP), and Reinforcement Learning (RL). However, high accuracy comes at a computational cost as larger networks require longer training time and no longer fit onto a single GPU. To reduce training costs, researchers are looking into the dynamics of different optimizers, in order to find ways to make training more efficient. Resource requirements can be limited by reducing model size during training or designing more efficient models that improve accuracy without increasing network size.
This thesis combines eigenvalue computation and high-dimensional loss surface visualization to study different optimizers and deep neural network models. Eigenvectors of different eigenvalues are computed, and the loss landscape and optimizer trajectory are projected onto the plane spanned by those eigenvectors. A new parallelization method for the stochastic Lanczos method is introduced, resulting in faster computation and thus enabling high-resolution videos of the trajectory and secondorder information during neural network training. Additionally, the thesis presents the loss landscape between two minima along with the eigenvalue density spectrum at intermediate points for the first time.
Secondly, this thesis presents a regularization method for Generative Adversarial Networks (GANs) that uses second-order information. The gradient during training is modified by subtracting the eigenvector direction of the biggest eigenvalue, preventing the network from falling into the steepest minima and avoiding mode collapse. The thesis also shows the full eigenvalue density spectra of GANs during training.
Thirdly, this thesis introduces ProxSGD, a proximal algorithm for neural network training that guarantees convergence to a stationary point and unifies multiple popular optimizers. Proximal gradients are used to find a closed-form solution to the problem of training neural networks with smooth and non-smooth regularizations, resulting in better sparsity and more efficient optimization. Experiments show that ProxSGD can find sparser networks while reaching the same accuracy as popular optimizers.
Lastly, this thesis unifies sparsity and neural architecture search (NAS) through the framework of group sparsity. Group sparsity is achieved through ℓ2,1-regularization during training, allowing for filter and operation pruning to reduce model size with minimal sacrifice in accuracy. By grouping multiple operations together, group sparsity can be used for NAS as well. This approach is shown to be more robust while still achieving competitive accuracies compared to state-of-the-art methods
Dissertation D. Dongol
The manufacturing of conventional electronics has become a highly complicated process, which requires intensive investment. In this context, printed electronics keeps attracting attention from both academia and industry. The primary reason is the simplification of the manufacturing process via additive printing technology such as ink-jet printing. Consequently, advantages are realized such as on-demand fabrication, minimal material waste and versatile choice of substrate materials. Central to the development of printed electronic circuits are printed transistors. Recently, metal oxide semiconductors such as indium oxide have become promising materials for the fabrication of printed transistors due to their high charge mobility. Furthermore, electrolyte-gating also provides benefits such as the low-voltage operation in sub-1 V regime due to the large gate capacitance provided by electrical double layers. This opens new possibilities to fabricate printed devices and circuits for niche applications.
To facilitate the design and fabrication of printed circuits, the development of compact models is necessary. However, most of the current works have focused on the study of the static behavior of transistors, while the in-depth understanding of other characteristics such as the dynamic or noise behavior is missing. To this end, the purpose of this work is the comprehensive study on capacitance and noise properties of inkjet-printed electrolyte-gated thin-film transistors (EGT) based on indium oxide semiconductors. Proper modeling approaches are also proposed to capture accurately the electrical behaviour, which can be further utilized to enable advanced analysis of digital, analog and mixed-signal circuits.
In this work, the capacitance of EGTs is characterized using voltage-dependent impedance spectroscopy. Intrinsic and extrinsic effects are carefully separated by using de-embedding test structures. Also, a dedicated equivalent circuit model is established to offer accurate simulations of the measured frequency response of the gate impedance. Based on that, it is revealed that top-gated EGTs have the potential to reach operation frequency in the kHz regime with proper optimizations of materials and printing process. Furthermore, a Meyer-like model is proposed to accurately capture the capacitance-voltage characteristics of the lumped terminal capacitance. Both parasitic and nonquasi-static effects are considered. This further enables the AC and transient analysis of complex circuits in circuit simulators.
Following, the study of noise properties in the field of printed electronics is conducted. Low-frequency noise of EGTs is characterized using a reliable experimental setup. By examining measured noise spectra of the drain current at various gate voltages, the number fluctuation with correlated mobility fluctuation has been determined as the primary noise mechanism. Based on that, normalized flat-band voltage noise can be determined as the key performance metrics, which is only 1.08 × 10−7 V^2 µm^2, significantly lower in comparison with other thin-film technologies, which are based on dielectric gating and semiconductors such as IZO and IGZO. A plausible reason could be the large gate capacitance offered by the electrical double layers. This renders EGT technology useful for low-noise and sensitive applications such as sensor periphery circuits.
Last but not least, various circuit designs based on EGT technology are proposed, including basic digital circuits such as inverters and ring oscillators. Their performance metrics such as the propagation delay and power consumption are extensively characterized. Also, the first design of a printed full-wave rectifier is presented by using diode-connected EGTs, which features near-zero threshold voltage. As a consequence, the presented rectifier can effectively process input voltage with a small amplitude of 100 mV and a cut-off frequency of 300 Hz, which is particularly attractive for the application domain of energy harvesting. Additionally, the previously established capacitance models are verified on those circuits, which provide a satisfactory agreement between the simulation and measurement data.