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Electrolyte-gated transistors (EGTs) represent an interesting alternative to conventional dielectric-gating to reduce the required high supply voltage for printed electronic applications. Here, a type of ink-jet printable ion-gel is introduced and optimized to fabricate a chemically crosslinked ion-gel by self-assembled gelation, without additional crosslinking processes, e.g., UV-curing. For the self-assembled gelation, poly(vinyl alcohol) and poly(ethylene-alt-maleic anhydride) are used as the polymer backbone and chemical crosslinker, respectively, and 1-ethyl-3-methylimidazolium trifluoromethanesulfonate ([EMIM][OTf]) is utilized as an ionic species to ensure ionic conductivity. The as-synthesized ion-gel exhibits an ionic conductivity of ≈5 mS cm−1 and an effective capacitance of 5.4 µF cm−2 at 1 Hz. The ion-gel is successfully employed in EGTs with an indium oxide (In2O3) channel, which shows on/off-ratios of up to 1.3 × 106 and a subthreshold swing of 80.62 mV dec−1.
In den letzten Jahren sind verstärkt große Batteriespeichersysteme in der Mittel- und Hochspannungsebene in Deutschland installiert worden. Neben dem Einsatz für lokale Anwendungszwecke wie Eigenverbrauchsmaximierung oder Lastspitzenkappung sind seit 2016 etwa 250 MW aus Batteriespeichern für die Teilnahme am Markt für Primärregelleistung (PRL) präqualifiziert worden. Damit können bereits 40 % des aktuellen Bedarfs der deutschen Übertragungsnetzbetreiber (ÜNB) gedeckt werden. Für einen zuverlässigen Betrieb von Batteriespeichern sind intelligente Betriebsstrategien erforderlich, die im Rahmen dieser Analyse vorgestellt werden.
The Humboldt Portal has been designed and implemented as part of an ongoing research project to develop an information system on the Internet to share the documents and rare books of Alexander von Humboldt, a 19th century German scientist and explorer, who viewed the natural world holistically and described the harmony of nature among the diversity of the physical world. Even after more than two centuries he is admired for his ability to see the natural world and human nature in the context of a complex network of relationships. The design and implementation of the Humboldt Portal are also oriented to support further research on Humboldt’s intellectual perspective.
Although all of Humboldt's works can be found on the internet as digitized documents, the complexity and internal inter-connectivity of his vision of nature cannot be adequately represented only by digitized papers or scanned documents in digital libraries.
As a consequence a specific portal of the Humboldt's documents was developed, which extends the standards of digital libraries and offers a technical approach for the adequate presentation of highly interconnected data.
Due to the continuous scientific and literary research, new insights and requirements for the digital presentation of Humboldt documents are constantly emerging, so that this article only provides a summary of the concepts realized at now. Consequently, the design and implementation of the Humboldt Portal is both: a consequence of a continuing research project and oriented to support more research on Humboldt´s intellectual holistic perspective, which was an anticipation to the System Approach of the last Century.
Commercial simulators can only reproduce electrocardiograms (ECG) of the normal and diseased heart rhythm in a simplified waveform and with a low number of channels. With the presented project, the variety of digitally archived ECGs, recorded during electrophysiological examinations, should be made usable as original analogue signals for research and teaching purposes by the development of a special printed circuit board for the mini-computer “Raspberry-Pi “.
Heat generation that is coupled with electricity usage, like combined heat and power generators or heat pumps, can provide operational flexibility to the electricity sector. In order to make use of this in an optimized way, the flexibility that can be provided by such plants needs to be properly quantified. This paper proposes a method for quantifying the flexibility provided through a cluster of such heat generators. It takes into account minimum operational time and minimum down-time of heat generating units. Flexibility is defined here as the time period over which plant operation can be either delayed or forced into operation, thus providing upward or downward regulation to the power system on demand. Results for one case study show that a cluster of several smaller heat generation units does not provide much more delayed operation flexibility than one large unit with the same power, while it more than doubles the forced operation flexibility. Considering minimum operational time and minimum down-time of the units considerably limits the available forced and delayed operation flexibility, especially in the case of one large unit.
Occluders made of the shape memory alloy Nitinol are commonly used to close Atrial Septal Defects (ASD). Until now, standard parameters are missing defining the mechanical properties of these implants. In this study,we developed a special measuring setup for the determination of the mechanical properties of customly available occluders (i.e. Occlutech Figulla®Flex II 29ASD12 and AGA AMPLATZER™9-ASD-012
The Future of FDI: Achieving the Sustainable Development Goals 2030 through Impact Investment
(2019)
Publicized as a global call for action in 2015, the United Nations General Assembly passed a resolution on the Sustainable Development Goals 2030 (SDGs). Before issuing the SDGs in 2015, the United Nations Conference on Trade and Development (UNCTAD) has already identified in 2014, as part of their World Investment Report, that especially developing countries are facing an estimated USD 2.5 trillion funding gap annually in the efforts to achieve the SDGs. Yet, the investment opportunities and challenges for investors, when contributing to the closure of this funding gap while benefiting from its economic potential have not been widely discussed. Despite that Foreign Direct Investments (FDI) are a key driver to sustainable economic growth and prosperity of a nation, policies and a holistic framework linking the 2030 Agenda to actionable investment opportunities for private investors are missing. Furthermore, a global platform capturing, channeling and promoting investment projects aiming to achieve the SDGs through impact investment has not been established. Utilizing global financial resources more effectively while developing new approaches and tools to promote impact investments, which demonstrate the benefits for investors to tap into the funding gap of the 2030 Agenda, will have the potential to significantly shape and influence the future of FDI.
Finding clusters in high dimensional data is a challenging research problem. Subspace clustering algorithms aim to find clusters in all possible subspaces of the dataset, where a subspace is a subset of dimensions of the data. But the exponential increase in the number of subspaces with the dimensionality of data renders most of the algorithms inefficient as well as ineffective. Moreover, these algorithms have ingrained data dependency in the clustering process, which means that parallelization becomes difficult and inefficient. SUBSCALE is a recent subspace clustering algorithm which is scalable with the dimensions and contains independent processing steps which can be exploited through parallelism. In this paper, we aim to leverage the computational power of widely available multi-core processors to improve the runtime performance of the SUBSCALE algorithm. The experimental evaluation shows linear speedup. Moreover, we develop an approach using graphics processing units (GPUs) for fine-grained data parallelism to accelerate the computation further. First tests of the GPU implementation show very promising results.
In many application domains, in particular automotives, guaranteeing a very low failure rate is crucial to meet functional and safety standards. Especially, reliable operation of memory components such as SRAM cells is of essential importance. Due to aggressive technology downscaling, process and runtime variations significantly impact manufacturing yield as well as functionality. For this reason, a thorough memory failure rate assessment is imperative for correct circuit operation and yield improvement. In this regard, Monte Carlo simulations have been used as the conventional method to estimate the variability induced failure rate of memory components. However, Monte Carlo methods become infeasible when estimating rare events such as high-sigma failure rates. To this end, Importance Sampling methods have been proposed which reduce the number of required simulations substantially. However, existing methods still suffer from inaccuracies and high computational efforts, in particular for high-sigma problems. In this paper, we fill this gap by presenting an efficient mixture Importance Sampling approach based on Bayesian optimization, which deploys a surface model of the objective function to find the most probable failure points. Its advantages include constant complexity independent of the dimensions of design space, the potential to find the global extrema, and higher trustworthiness of the estimated failure rate by accurately exploring the design space. The approach is evaluated on a 6T-SRAM cell as well as a master-slave latch based on a 28nm FDSOI process. The results show an improvement in accuracy, resulting in up to 63× better accuracy in estimating failure rates compared to the best state-of-the-art solutions on a 28nm technology node.
Printed systems spark immense interest in industry, and for several parts such as solar cells or radio frequency identification antennas, printed products are already available on the market. This has led to intense research; however, printed field-effect transistors (FETs) and logics derived thereof still have not been sufficiently developed to be adapted by industry. Among others, one of the reasons for this is the lack of control of the threshold voltage during production. In this work, we show an approach to adjust the threshold voltage (Vth) in printed electrolyte-gated FETs (EGFETs) with high accuracy by doping indium-oxide semiconducting channels with chromium. Despite high doping concentrations achieved by a wet chemical process during precursor ink preparation, good on/off-ratios of more than five orders of magnitude could be demonstrated. The synthesis process is simple, inexpensive, and easily scalable and leads to depletion-mode EGFETs, which are fully functional at operation potentials below 2 V and allows us to increase Vth by approximately 0.5 V.
Development of Fully Printed Oxide Field-Effect Transistors using Graphene Passive Structures
(2019)
During the past decade to the present time, the topic of printed electronics has gained a lot of attention for their potential use in a number of practical applications, including biosensors, photovoltaic devices, RFIDs, flexible displays, large-area circuits, and so on. To fully realize printed electronic components and devices, effective techniques for the printing of passive structures and electrically and chemically compatible materials in the printed devices need to be developed first. The opportunity of using electrically conducting graphene inks will enable the integration of passive structures into active devices, as for example, printed electrolyte-gated transistors (EGTs). Accordingly, in this study, we present the parametric results obtained on fully printed electrolyte-gated transistors having graphene as the passive electrodes, an inorganic oxide semiconductor as the active channel, and a composite solid polymer electrolyte (CSPE) as the gate insulating material. This configuration offers high chemical and electrical stability while at the same time allowing EGT operation at low potentials, implying the distinct advantage of operation at low input voltages. The printed in-plane EGTs we developed exhibit excellent performance with device mobility up to 16 cm2 V–1 s–1, an ION/IOFF ratio of 105, and a subthreshold slope of 120 mV dec–1.
Printed electronics (PE) circuits have several advantages over silicon counterparts for the applications where mechanical flexibility, extremely low-cost, large area, and custom fabrication are required. The custom (personalized) fabrication is a key feature of this technology, enabling customization per application, even in small quantities due to low-cost printing compared with lithography. However, the personalized and on-demand fabrication, the non-standard circuit design, and the limited number of printing layers with larger geometries compared with traditional silicon chip manufacturing open doors for new and unique reverse engineering (RE) schemes for this technology. In this paper, we present a robust RE methodology based on supervised machine learning, starting from image acquisition all the way to netlist extraction. The results show that the proposed RE methodology can reverse engineer the PE circuits with very limited manual effort and is robust against non-standard circuit design, customized layouts, and high variations resulting from the inherent properties of PE manufacturing processes.
Printed electrolyte-gated oxide electronics is an emerging electronic technology in the low voltage regime (≤1 V). Whereas in the past mainly dielectrics have been used for gating the transistors, many recent approaches employ the advantages of solution processable, solid polymer electrolytes, or ion gels that provide high gate capacitances produced by a Helmholtz double layer, allowing for low-voltage operation. Herein, with special focus on work performed at KIT recent advances in building electronic circuits based on indium oxide, n-type electrolyte-gated field-effect transistors (EGFETs) are reviewed. When integrated into ring oscillator circuits a digital performance ranging from 250 Hz at 1 V up to 1 kHz is achieved. Sequential circuits such as memory cells are also demonstrated. More complex circuits are feasible but remain challenging also because of the high variability of the printed devices. However, the device inherent variability can be even exploited in security circuits such as physically unclonable functions (PUFs), which output a reliable and unique, device specific, digital response signal. As an overall advantage of the technology all the presented circuits can operate at very low supply voltages (0.6 V), which is crucial for low-power printed electronics applications.
Electrolyte-gated, printed field-effect transistors exhibit high charge carrier densities in the channel and thus high on-currents at low operating voltages, allowing for the low-power operation of such devices. This behavior is due to the high area-specific capacitance of the device, in which the electrolyte takes the role of the dielectric layer of classical architectures. In this paper, we investigate intrinsic double-layer capacitances of ink-jet printed electrolyte-gated inorganic field-effect transistors in both in-plane and top-gate architectures by means of voltage-dependent impedance spectroscopy. By comparison with deembedding structures, we separate the intrinsic properties of the double-layer capacitance at the transistor channel from parasitic effects and deduce accurate estimates for the double-layer capacitance based on an equivalent circuit fitting. Based on these results, we have performed simulations of the electrolyte cutoff frequency as a function of electrolyte and gate resistances, showing that the top-gate architecture has the potential to reach the kilohertz regime with proper optimization of materials and printing process. Our findings additionally enable accurate modeling of the frequency-dependent capacitance of electrolyte/ion gel-gated devices as required in the small-signal analysis in the circuit simulation.
In the domain of printed electronics (PE), field-effect transistors (FETs) with an oxide semiconductor channel are very promising. In particular, the use of high gate-capacitance of the composite solid polymer electrolytes (CSPEs) as a gate-insulator ensures extremely low voltage requirements. Besides high gate capacitance, such CSPEs are proven to be easily printable, stable in air over wide temperature ranges, and possess high ion conductivity. These CSPEs can be sensitive to moisture, especially for high surface-to-volume ratio printed thin films. In this paper, we provide a comprehensive experimental study on the effect of humidity on CSPE-gated single transistors. At the circuit level, the performance of ring oscillators (ROs) has been compared for various humidity conditions. The experimental results of the electrolyte-gated FETs (EGFETs) demonstrate rather comparable currents between 30%-90% humidity levels. However, the shifted transistor parameters lead to a significant performance change of the RO frequency behavior. The study in this paper shows the need of an impermeable encapsulation for the CSPE-gated FETs to ensure identical performance at all humidity conditions.
Printed electronics can benefit from the deployment of electrolytesas gate insulators,which enables a high gate capacitance per unit area (1–10 μFcm−2) due to the formation of electrical double layers (EDLs). Consequently, electrolyte-gated field-effect transistors (EGFETs) attain high-charge carrier densities already in the subvoltage regime, allowing for low-voltage operation of circuits and systems. This article presents a systematic study of lumped terminal capacitances of printed electrolyte-gated transistors under various dc bias conditions. We perform voltage-dependent impedancemeasurements and separate extrinsic components from the lumped terminal capacitance.
The proposed Meyer-like capacitance model, which also accounts for the nonquasi-static (NQS) effect, agrees well with experimental data. Finally, to verify the model, we implement it in Verilog-A and simulate the transient response of an inverter and a ring oscillator circuit. Simulation results are in good agreement with the measurement data of fabricated devices.
Thermisch angetriebene (Adsorptions-)Kältemaschinen können mit einem verhältnismäßig geringen elektrischen Energieaufwand bzw. mit einer hohen elektrischen Leistungszahl Kälte bereitstel-len. Wird die zum Antrieb erforderliche Wärme aus industrieller Abwärme bereitgestellt, ist diese Kältebereitstellung energetisch effizienter als die Kältebereitstellung über eine Kompressionskäl-temaschine. Wird die Wärme jedoch in Kraft-Wärme-Kopplung bereitgestellt, ist die primärenergetische Bewertung sowohl von mehreren Teilwirkungsgraden als auch den Primärenergiefaktoren für den eingesetzten Brennstoff und die erzeugte bzw. bezogene elektrische Energie abhängig. Eine umfangreiche Messkampagne im Sommer 2018 liefert unter realitätsnahen Randbedingungen in einer Labor umgebung detaillierte Energiekennzahlen für einen typischen Tagesgang des Kältebedarfs. Damit gelingt es, Teilenergiekennwerte für die Planungspraxis abzuleiten und das Gesamtsystem energetisch mit einer konventionellen Kompressionskältemaschine zu vergleichen.
In this article we outline the model development planned within the joint projectModel-based city planningand application in climate change (MOSAIK). The MOSAIK project is funded by the German FederalMinistry of Education and Research (BMBF) within the frameworkUrban Climate Under Change ([UC]2)since 2016. The aim of MOSAIK is to develop a highly-efficient, modern, and high-resolution urban climatemodel that allows to be applied for building-resolving simulations of large cities such as Berlin (Germany).The new urban climate model will be based on the well-established large-eddy simulation code PALM, whichalready has numerous features related to this goal, such as an option for prescribing Cartesian obstacles. Inthis article we will outline those components that will be added or modified in the framework of MOSAIK.Moreover, we will discuss the everlasting issue of acquisition of suitable geographical information as inputdata and the underlying requirements from the model's perspective.
In numerical calculations, guided acoustic waves, localized in two spatial dimensions, have been shown to exist and their properties have been investigated in three different geometries, (i) a half-space consisting of two elastic media with a planar interface inclined to the common surface, (ii) a wedge made of two elastic media with a planar interface, and (iii) the free edge of an elastic layer between two quarter-spaces or two wedge-shaped pieces of a material with elastic properties and density differing from those of the intermediate layer.
For the special case of Poisson media forming systems (i) and (ii), the existence ranges of these 1D guided waves in parameter space have been determined and found to strongly depend on the inclination angle between surface and interface in case (i) and the wedge angle in case (ii). In a system of type (ii) made of two materials with strong acoustic mismatch and in systems of type (iii), leaky waves have been found with a high degree of spatial localization of the associated displacements, although the two materials constituting these structures are isotropic.
Both the fully guided and the leaky waves analyzed in this work could find applications in non-destructive evaluation of composite structures and should be accounted for in geophysical prospecting, for example.
A critical comparison is presented of the two computational approaches employed, namely a semi-analytical finite element scheme and a method based on an expansion of the displacement field in a double series of special functions.
A physical unclonable function (PUF) is a hardware circuit that produces a random sequence based on its manufacturing-induced intrinsic characteristics. In the past decade, silicon-based PUFs have been extensively studied as a security primitive for identification and authentication. The emerging field of printed electronics (PE) enables novel application fields in the scope of the Internet of Things (IoT) and smart sensors. In this paper, we design and evaluate a printed differential circuit PUF (DiffC-PUF). The simulation data are verified by Monte Carlo analysis. Our design is highly scalable while consisting of a low number of printed transistors. Furthermore, we investigate the best operating point by varying the PUF challenge configuration and analyzing the PUF security metrics in order to achieve high robustness. At the best operating point, the results show areliability of 98.37% and a uniqueness of 50.02%, respectively. This analysis also provides useful and comprehensive insights into the design of hybrid or fully printed PUF circuits. In addition, the proposed printed DiffC-PUF core has been fabricated with electrolyte-gated field-effect transistor technology to verify our design in hardware.