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Den Hauptbestandteil des Operationssystems stellt der Zugriff auf SD-Karten mit dem Dateisystem FAT16 von Microsoft dar. Für die Bedienung wurde ein Kommandozeileninterpreter implementiert. Als Ein- und Ausgabegerät dient ein PC mit einem speziellen Terminalprogramm, welcher über USB mit dem Emulationsboard des SIRIUS Softcores verbunden ist. Das System wird über die Eingabe von Befehlen am Terminal gesteuert.
Der SIRIUS Softcore kann nur vom Flash des Emulationsboards booten. Da das Betriebssystem selbst jedoch auf der SD-Karte gespeichert werden soll, ist ein Basis-Betriebssystem erforderlich, welches im Flash abgelegt ist. Das Basis-Betriebssystem lädt gleich nach dem Start das eigentliche Betriebssystem von der SD-Karte. Falls jedoch keine SD-Karte gesteckt ist, ermöglicht das Basis-Betriebssystem mit einem Kommandozeileninterpreter einige Grundfunktionen.
Der Cache-Speicher für den Softprozessor SIRIUS ist ein 4-fach assoziativer Cache-Speicher, der mit einem DDR-Interface auf einen externen Speicher zugreifen kann. Er verwaltet und beschleunigt Zugriffe vom Prozessor auf diesen Speicher. Der Cache-Speicher arbeitet intern mit 32 Bit und der doppelten Prozessortaktfrequenz und ermöglicht Systeme mit größeren Speicheranforderungen ohne signifikante Performanceverluste. Der Cache-Speicher wurde mit der Hardwarebeschreibungssprache VHDL erstellt und mit dem bestehenden Mikrocontrollersystem verbunden.
Das Gesamtsystem wurde zunächst simuliert und anschließend mit dem Cyclone III FPGA Starter Kit von Altera, welches ein 32 MB DDR-RAM-Modul zur Verfügung stellt, durch Ausführen eines Testprogramms erfolgreich verifiziert. Für den kompletten Cache-Speicher werden inklusive der Pins für den externen Oszillator und des Reset-Tasters 3805 Logik-Zellen, 27 M9K-Blöcke, 44 Pins und eine PLL benötigt.
Die drei großen Hersteller von Cochlea-Implantat (CI)-Systemen ermöglichen es klinischen Audiologen, die Mikrofoneigenschaften der meisten CI-Sprachprozessoren zu prüfen. Dazu können bei diesen Sprachprozessoren Monitorkopfhörer angeschlossen und das/die Mikrofon(e) inklusive eines Teils der Signalvorverarbeitung abgehört werden. Präzise Angaben dazu, mit welchen Stimuli, bei welchem Pegel und nach welchem Kriterium diese Prüfung stattfinden soll, machen die CI-Hersteller nicht. Auf Basis dieser Prüfung soll der Audiologe dann über die Funktion der Mikrofone und damit darüber entscheiden, ob der betreffende Sprachprozessor an den Hersteller eingeschickt wird oder nicht.
Zur Objektivierung der CI-Sprachprozessor-Mikrofon-Prüfung haben wir eine Testbox entwickelt, mit der alle abhörbaren aktuellen CI-Sprachprozessoren der drei großen Hersteller geprüft werden können. Die Box wurde im 3D-Druck-Verfahren hergestellt. Der zu prüfende Sprachprozessor wird in die Messbox eingehängt und über einen darin verbauten Lautsprecher mit definierten Prüfsignalen (Sinustöne unterschiedlicher Frequenz) beschallt. Das Mikrofonsignal wird über das Kabel der Monitorkopfhörer herausgeführt und mit einer Shifting- and Scaling-Schaltung in einen Spannungsbereich transformiert, der für die AD-Wandlung mit einem Mikrokontroller (ATmega1280 verbaut auf einem Arduino Mega) geeignet ist. Derselbe Mikrokontroller übernimmt über einen eigens gebauten DA-Wandler die Ausgabe der Sinustöne über den Lautsprecher. Signalaufnahme und –wiedergabe erfolgen mit jeweils 38,5 kHz Samplingrate. Der für jede Frequenz über mehrere Perioden des Prüfsignals ermittelte Effektivwert wird mit dem Effektivwert, der mit einem neuwertigen Referenzprozessor für diese Frequenz gemessen wurde, verglichen. Die Messergebnisse werden graphisch auf einem Display ausgegeben.
Derzeit läuft eine erste Datenerhebung mit in der Klinik subjektiv auffällig gewordenen CI-Sprachprozessoren, die anschließend in der Messbox untersucht werden. So sollen realistische Schwellen für kritische Abweichungen von den Referenz-Effektivwerten ermittelt werden. Im weiteren Verlauf sollen dann Hit und False Alarm-Raten der subjektiven Prüfung bestimmt werden.
The ability to detect a target signal masked by noise is improved in normal-hearing listeners when interaural phase differences (IPDs) between the ear signals exist either in the masker or in the signal. To improve binaural hearing in bilaterally implanted cochlear implant (BiCI) users, a coding strategy providing the best possible access to IPDs is highly desirable. Outcomes of a previous study (Zirn, Arndt et al. 2016) revealed that a subset of BiCI users showed improved IPD detection thresholds with the fine structure processing strategy FS4 compared to the constant rate strategy HDCIS using narrowband stimuli. In contrast, little differences between the coding strategies were found for broadband stimuli with regard to binaural speech intelligibility level differences (BILD) as an estimate of binaural unmasking. Compared to normalhearing listeners (7.5 ± 1.2 dB) BILD were small in BiCI users (around 0.5 dB with both coding strategies).
In the present work, we investigated the influence of binaural fitting parameters on BILD. In our cohort of BiCI users many were implanted with electrode arrays differing in length left versus right. Because this length difference typically corresponded to the distance of two electrode contacts the first modification of bilateral fitting was a tonotopic adjustment by deactivation of the most apical electrode contact on the side with the deeper inserted array (tonotopic approach).
The second modification was the isolation of the residual, most apical electrode contacts by deactivation of the basally adjacent electrode contact on each side (tonotopic sparse approach). Applying these modifications, BILD improved by up to 1.5 dB.
The ability to detect a signal masked by noise is improved in normal-hearing (NH) listeners when interaural phase differences (IPD) between the ear signals exist either in the masker or the signal. We determined the impact of different coding strategies in bilaterally implanted cochlear implant (BiCI) users with and without fine-structure coding (FSC) on masking level differences. First, binaural intelligibility level differences (BILD) were determined in NH listeners and BiCI users using their clinical speech processors. NH subjects (n=8) showed a significant mean BILD of 7.5 dB. In contrast, BiCI users (n=9) without FSC as well as with FSC revealed a barely significant mean BILD (0.4 dB respectively 0.6 dB). Second, IPD thresholds were measured in BiCI users using either their speech processors with FS4 or direct stimulation with FSC. With the latter approach, synchronized stimulation providing an interaural accuracy of stimulation timing of 1.67 µs was realized on pitch matched electrode pairs. The resulting individual IPD threshold was lower in most of the subjects with direct stimulation than with their speech processors. These outcomes indicate that some BiCI users can benefit from increased temporal precision of interaural FSC and adjusted interaural frequency-place mapping presumably resulting in improved BILD.
Das normalhörende auditorische System ist in der Lage, interaurale Zeit- bzw. Phasendifferenzen zur verbesserten Signaldetektion im Störgeräusch zu nutzen. Dieses Phänomen wird häufig als binaurale Entmaskierung bezeichnet und ist sowohl bei einfachen Signalen wie Sinustönen, als auch bei Sprachsignalen im Störgeräusch wirksam. Vorangegangene Studien haben gezeigt, dass binaurale Entmaskierung eingeschränkt auch bei bilateralen CI-Trägern beobachtbar ist (Zirn et al., 2016).
Aktuelle Ergebnisse zeigen, dass die binaurale Entmaskierung sensitiv gegenüber der bilateralen CI-Anpassung ist. So lässt sich der Effekt durch tonotopen Abgleich und Herausstellen eines apikalen Feinstrukturkanals modulieren. Steigerungen der binauralen Entmaskierung um bis zu 1,5 dB sind auf diese Weise gegenüber der konventionellen CI-Anpassung möglich. Allerdings variiert der Einfluss der CI-Anpassung interindividuell erheblich.
BiCI users’ sensitivity to interaural phase differences for single- and multi-channel stimulation
(2016)
Für die Implementation in ASIC's wurde ein kompakter Mikroprozessor-Kernel als Standardzellen-Makro entworfen. Durch konsequenten Einsatz von Hochsprachen und CAE-Werkzeugen (VHDL, Synthese) konnte ein vollständiges Design in nur vier Monaten durchgeführt werden. Der Prozessor wird in einem Testchip erprobt.
Uncontrollable manufacturing variations in electrical hardware circuits can be exploited as Physical Unclonable Functions (PUFs). Herein, we present a Printed Electronics (PE)-based PUF system architecture. Our proposed Differential Circuit PUF (DiffC-PUF) is a hybrid system, combining silicon-based and PE-based electronic circuits. The novel approach of the DiffC-PUF architecture is to provide a specially designed real hardware system architecture, that enables the automatic readout of interchangeable printed DiffC-PUF core circuits. The silicon-based addressing and evaluation circuit supplies and controls the printed PUF core and ensures seamless integration into silicon-based smart systems. Major objectives of our work are interconnected applications for the Internet of Things (IoT).
The importance of obtaining simultaneous particle size and concentration values has grown up with continuing discussion of the health effects, of internal combustion engine generated particulate emissions and in particular of Diesel soot emissions. In the present work an aerosol measurement system is described that delivers information about particle size and concentration directly from the undiluted exhaust gas.
Using three laser diodes of different wavelengths which form one parallel light beam, each spectral attenuation is analysed by a single detector and the particle diameter and concentration is evaluated by the use of the Mie theory and shown on-line at a frequency of 1 Hz. The system includes an optical long-path-cell (White principle) with an adjustable path length from 2.5 to 15 m, which allows the analysis within a broad concentration range.
On-line measurements of the particulate emissions in the hot, undiluted exhaust of Diesel engines are presented under stationary and transient engine’s load conditions. Mean particle diameters well below 100 nm are detected for modern Diesel engines. The measured particle concentration corresponds excellently with the traditional gravimetrical measurements of the diluted exhaust. Additionally, measurements of particle emissions (mostly condensed hydricarbons) from a two-stroke engine are presented and discussed.
In the last decade, IPv6 over Low power Wireless Personal Area Networks (IEEE802.15.4), also known as 6LoWPAN, has well evolved as a primary contender for short range wireless communications and holds the promise of an Internet of Things, which is completely based on the Internet Protocol. The authors' team has developed a 6LoWPAN protocol stack in C language, the stack without the necessity to use a specific design environment or operating system. It is highly flexible, modular, and portable and can be enhanced by several interesting modules, like a Wake-On-Radio-(WOR) MAC layer or a TLS1.2 based security sublayer. The stack is made available as open source at https://github.com/hso-esk/emb6. It was extensively tested on the Automated Physical Testbed (APTB) for Wireless Systems, which is available in the authors' lab and allows a flexible setup and full control of arbitrary topologies. The results of the measurements demonstrate a very good stability and short-term with long-term performance also under dynamic conditions.
The overview of public key infrastructure based security approaches for vehicular communications
(2015)
Modern transport infrastructure becomes a full member of globally connected network. Leading vehicle manufacturers have already triggered development process, output of which will open a new horizon of possibilities for consumers and developers by providing a new communication entity - a car, thus enabling Car2X communications. Nevertheless some of available systems already provide certain possibilities for vehicles to communicate, most of them are considered not sufficiently secured. During last 15 years a number of big research projects funded by European Union and USA governments were started and concluded after which a set of standards were published prescribing a common architecture for Car2X and vehicles onboard communications. This work concentrates on combining inner and outer vehicular communications together with a use of Public Key Infrastructure (PKI).
Wireless communication systems more and more become part of our daily live. Especially with the Internet of Things (IoT) the overall connectivity increases rapidly since everyday objects become part of the global network. For this purpose several new wireless protocols have arisen, whereas 6LoWPAN (IPv6 over Low power Wireless Personal Area Networks) can be seen as one of the most important protocols within this sector. Originally designed on top of the IEEE802.15.4 standard it is a subject to various adaptions that will allow to use 6LoWPAN over different technologies; e.g. DECT Ultra Low Energy (ULE). Although this high connectivity offers a lot of new possibilities, there are several requirements and pitfalls coming along with such new systems. With an increasing number of connected devices the interoperability between different providers is one of the biggest challenges, which makes it necessary to verify the functionality and stability of the devices and the network. Therefore testing becomes one of the key components that decides on success or failure of such a system. Although there are several protocol implementations commonly available; e.g., for IoT based systems, there is still a lack of according tools and environments as well as for functional and conformance testing. This article describes the architecture and functioning of the proposed test framework based on Testing and Test Control Notation Version 3 (TTCN-3) for 6LoWPAN over ULE networks.
Extended Performance Measurements of Scalable 6LoWPAN Networks in an Automated Physical Testbed
(2015)
IPv6 over Low power Wireless Personal Area Networks, also known as 6LoWPAN, is becoming more and more a de facto standard for such communications for the Internet of Things, be it in the field of home and building automation, of industrial and process automation, or of smart metering and environmental monitoring. For all of these applications, scalability is a major precondition, as the complexity of the networks continuously increase. To maintain this growing amount of connected nodes a various 6LoWPAN implementations are available. One of the mentioned was developed by the authors' team and was tested on an Automated Physical Testbed for Wireless Systems at the Laboratory Embedded Systems and Communication Electronics of Offenburg University of Applied Sciences, which allows the flexible setup and full control of arbitrary topologies. It also supports time-varying topologies and thus helps to measure performance of the RPL implementation. The results of the measurements prove an excellent stability and a very good short and long-term performance also under dynamic conditions. In all measurements, there is an advantage of minimum 10% with regard to the average times, like global repair time; but the advantage with reagr to average values can reach up to 30%. Moreover, it can be proven that the performance predictions from other papers are consistent with the executed real-life implementations.
In the last decade, IPv6 over Low power Wireless Personal Area Networks, also known as 6LoWPAN, has well evolved as a primary contender for short range wireless communication and holds the promise of an Internet of Things, which is completely based on the Internet Protocol. In the meantime, various 6LoWPAN implementations are available, be it open source or commercial. One of these implementations, which was developed by the authors' team, was tested on an Automated Physical Testbed for Wireless Systems at the Laboratory Embedded Systems and Communication Electronics of Offenburg University of Applied Sciences, which allows the flexible setup and full control of arbitrary topologies. It also supports time-varying topologies and thus helps to measure performance of the RPL implementation. The results of the measurements show a very good stability and short-term and long-term performance also under dynamic conditions. In addition, it can be proven that the performance predictions from other papers are consistent with real-life implementations.
The CAN bus still is an important fieldbus in various domains, e.g. for in-car communication or automation applications. To counter security threats and concerns in such scenarios we design, implement, and evaluate the use of an end-to-end security concept based on the Transport Layer Security protocol. It is used to establish authenticated, integrity-checked, and confidential communication channels between field devices connected via CAN. Our performance measurements show that it is possible to use TLS at least for non time-critical applications, as well as for generic embedded networks.
Implementierung von Softcore-Prozessoren und/oder weiteren IPs (Intellectual Property) in FPGAs
(2018)
Die zunehmende Integration von kompletten Systemen auf einem Chip (System-on-Chip, SoC) erfordert auch immer die Integration einer Recheneinheit bzw. eines Prozessorkerns. Möchte man insbesondere Low-Power-SoC-Systeme entwickeln, z.B. drahtlose Sensor-SoC-Systeme für Anwendungen im Rahmen von Industrie 4.0, ist die Implementierung eines solchen Prozessorkerns mit hohen Herausforderungen verbunden. Prinzipiell können hierfür verschiedene Ansätze verfolgt werden, nämlich die Implementierung einer Hardcore Prozessor-IP (IP = Intellectual Property) oder einer Softcore-Prozessor-IP. Im vorliegenden Beitrag wird zunächst auf den derzeitigen Stand der Technik verfügbarer Hardcore- oder Softcore-Prozessoren unter den Randbedingungen der Low-Power-Anforderungen und der weiten Verbreitung des Cores in industriellen Anwendungen eingegangen. Schließlich werden die Ergebnisse der Implementierung und Evaluierung eines derzeit frei verfügbaren 16-bit MSP430-kompatiblen Softcore Prozessors auf einem Altera-Cyclon-FPGA vorgestellt. Aus den Ergebnissen wird ein entsprechendes Fazit für die Implementierung von Low-Power-SoC-Systeme gegeben.
The demand of wireless solutions in industrial applications increases since the early nineties. This trend is not only ongoing, it is further pushed by developments in the area of software stacks like the latest Bluetooth Low Energy Stack. It is also pushed by new chip-designs and powerful and highly integrated electronic hardware. The acceptance of wireless technologies as a possible solution for industrial applications, has overcome the entry barrier [1]. The first step to see wireless as standard for many industrial applications is almost accomplished. Nevertheless there is nearly none acceptance of wireless technology for Safety applications. One highly challenging and demanding requirement is still unsolved: The aspect safety and robustness. Those topics have been addressed in many cases but always in a similar manner. WirelessHART as an example addresses this topic with redundant so called multiple propagation paths and frequency hopping to handle with interferences and loss of network participants. So far the pure peer to peer link is rarely investigated and there are less safety solutions available. One product called LoRa™ can be seen as one possible solution to address this lack of safety within wireless links. This paper focuses on the safety performance evaluation of a modem-chip-design. The use of diverse and redundant wireless technologies like LoRa can lead to an increase acceptance of wireless in safety applications. Many measurements in real industrial application have been carried out to be able to benchmark the new chip in terms of the safety aspects. The content of this research results can help to raise the level of confidence in wireless. In this paper, the term “safety” is used for data transmission reliability.
Battery degradation is a complex physicochemical process that strongly depends on operating conditions and environment. We present a model-based analysis of lithium-ion battery degradation in smart microgrids, in particular, a single-family house and an office tract with photovoltaics generator. We use a multi-scale multi-physics model of a graphite/lithium iron phosphate (LiFePO4, LFP) cell including SEI formation as ageing mechanism. The cell-level model is dynamically coupled to a system-level model consisting of photovoltaics, inverter, power consumption profiles, grid interaction, and energy management system, fed with historic weather data. The behavior of the cell in terms of degradation propensity, performance, state of charge and other internal states is predicted over an annual operation cycle. As result, we have identified a peak in degradation rate during the battery charging process, caused by charging overpotentials. Ageing strongly depends on the load situation, where the predicted annual capacity fade is 1.9 % for the single-family house and only 1.3 % for the office tract.
iSign - internet based simulation of guided wave propagation - ist eine Lernumgebung für Online-Laborversuche. Die Client-Serverarchitektur nutzt server-seitig das Tool F3D, das elektromagnetische Felder in 3D-Strukturen berechnet. Ein Apache-Webserver (unter Linux) bedient den Theorie-/Aufgaben-Teil und die Lernsystemadministration. Ein HPUX Simulationsserver steuert und kontrolliert den mehrstufigen Simulationsvorgang. Eine MySQL-Datenbank erlaubt dynmaische Webseiten-Generierung und Simulations-, Projekt- und Userdatenhaltung. Java-Applets, JavaServer Pages und JavaBeans erzeugen die interaktive Client-Oberfläche zur Eingabe, Ergebnisdarstellung und für Online-Virtual Reality. Die einheitlich gestaltete Benutzeroberfläche verbirgt die Systemkomplexität.
IPv6 over LoRaWAN™
(2016)
Although short-range wireless communication explicitly targets local and regional applications, range continues to be a highly important issue. The range directly depends on the so-called link budget, which can be increased by the choice of modulation and coding schemes. The recent transceiver generation in particular comes with extensive and flexible support for software-defined radio (SDR). The SX127× family from Semtech Corp. is a member of this device class and promises significant benefits for range, robust performance, and battery lifetime compared to competing technologies. This contribution gives a short overview of the technologies to support Long Range (LoRa™) and the corresponding Layer 2 protocol (LoRaWAN™). It particularly describes the possibility to combine the Internet Protocol, i.e. IPv6, into LoRaWAN™, so that it can be directly integrated into a full-fledged Internet of Things (IoT). The proposed solution, which we name 6LoRaWAN, has been implemented and tested; results of the experiments are also shown in this paper.
Signal detection and bandwidth estimation, also known as channel segmentation or information channel estimation, is a perpetual topic in communication systems. In the field of radio monitoring this issue is extremely challenging, since unforeseeable effects like fading occur accidentally. In addition, most radio monitoring devices normally scan a wide frequency range of several hundred MHz and have to detect a multitude of different signals, varying in signal power, bandwidth and spectral shape. Since narrowband sensing techniques cannot be directly applied, most radio monitoring devices use Nyquist wideband sensing to discover the huge frequency range. In practice, sensing is normally conducted by an FFT sweep spectrum analyzer that delivers the power spectral density (PSD) values to the radio monitoring system. The channel segmentation is the initial step of a comprehensive signal analysis in a radio monitoring system based on the PSD values. In this paper, a novel approach for channel segmentation is presented that is based on a quantization and a histogram evaluation of the measured PSD. It will be shown that only the combination of both evaluations will lead to an successful automatic channel segmentation. The performance of the proposed algorithm is shown in a real radio monitoring szenario.
Security in IT systems, particularly in embedded devices like Cyber Physical Systems (CPSs), has become an important matter of concern as it is the prerequisite for ensuring privacy and safety. Among a multitude of existing security measures, the Transport Layer Security (TLS) protocol family offers mature and standardized means for establishing secure communication channels over insecure transport media. In the context of classical IT infrastructure, its security with regard to protocol and implementation attacks has been subject to extensive research. As TLS protocols find their way into embedded environments, we consider the security and robustness of implementations of these protocols specifically in the light of the peculiarities of embedded systems. We present an approach for systematically checking the security and robustness of such implementations using fuzzing techniques and differential testing. In spite of its origin in testing TLS implementations we expect our approach to likewise be applicable to implementations of other cryptographic protocols with moderate efforts.
The Transport Layer Security (TLS) protocol is a cornerstone of secure network communication, not only for online banking, e-commerce, and social media, but also for industrial communication and cyber-physical systems. Unfortunately, implementing TLS correctly is very challenging, as becomes evident by considering the high frequency of bugfixes filed for many TLS implementations. Given the high significance of TLS, advancing the quality of implementations is a sustained pursuit. We strive to support these efforts by presenting a novel, response-distribution guided fuzzing algorithm for differential testing of black-box TLS implementations. Our algorithm generates highly diverse and mostly-valid TLS stimulation messages, which evoke more behavioral discrepancies in TLS server implementations than other algorithms. We evaluate our algorithm using 37 different TLS implementations and discuss―by means of a case study―how the resulting data allows to assess and improve not only implementations of TLS but also to identify underspecified corner cases. We introduce suspiciousness as a per-implementation metric of anomalous implementation behavior and find that more recent or bug-fixed implementations tend to have a lower suspiciousness score. Our contribution is complementary to existing tools and approaches in the area, and can help reveal implementation flaws and avoid regression. While being presented for TLS, we expect our algorithm's guidance scheme to be applicable and useful also in other contexts. Source code and data is made available for fellow researchers in order to stimulate discussions and invite others to benefit from and advance our work.
The Datagram Transport Layer Security (DTLS) protocol has been designed to provide end-to-end security over unreliable communication links. Where its connection establishment is concerned, DTLS copes with potential loss of protocol messages by implementing its own loss detection and retransmission scheme. However, the default scheme turns out to be suboptimal for links with high transmission error rates and low data rates, such as wireless links in electromagnetically harsh industrial environments. Therefore, in this paper, as a first step we provide an analysis of the standard DTLS handshake's performance under such adverse transmission conditions. Our studies are based on simulations that model message loss as the result of bit transmission errors. We consider several handshake variants, including endpoint authentication via pre-shared keys or certificates. As a second step, we propose and evaluate modifications to the way message loss is dealt with during the handshake, making DTLS deployable in situations which are prohibitive for default DTLS.
Als Fortsetzung des FHOP-Projektes wurde an der Fachhochschule Offenburg auf Basis des bestehenden Mikroprozessorkerns im Rahmen einer Diplomarbeit ein Mikrocontroller in ES2-0.7 μm-Technologie entworfen. Der Controller wurde modular aufgebaut mit den Komponenten: FHOP-Mikroprozessor, Buscontroller, Waitstate-Chipselect-Einheit, 16x16 Bit Multiplizierer, 2KB ROM, 256 Byte RAM, Watchdog, PIO mit 16 konfigurierbaren Ports, SIO, 2 Timer und ein Interruptcontroller für 8 Interrputquellen.
Der Chip benötigt bei einer Komplexität von ca. 65400 Transistoren eine Siliziumfläche von etwa 27 mm². Er wurde im September 1996 zur Fertigung gegeben und mittlerweile erfolgreich getestet. Das interne ROM des Mikrocontrollers enthält das BIOS sowie ein Testprogramm. Zur Erstellung der Software steht eine komplette Entwicklungsumgebung zur Verfügung. Sämtliche Komponenten stehen im FHOP-Design-Kit in Kürze zur Verfügung.
The Institute of Applied Research Offenburg is working in the field of autonomous data loggers since many years. In collaboration with industry, a new RFID based active sensor data logger for continuous recording of temperature has been developed and is now manufactured in mass production. Compared to existing systems, an unusual large data memory is integrated, which can be used via a simplified file system in a flexible way. The system will be used to accompany and monitor temperature sensitive goods of high value. The transponder is the first member of a new class of logging devices, the smallest will be not larger than a 2 Euro-coin with a fully integrated ASIC frontend.
Remote measurement of the physiology, so-called biotelemetry, is a key technology in the modern veterinary medicine. The usage of wireless implants has less impact on the behavior of animals than manual measurement methods and cause less disturbance than wired devices. But, common biotelemetry still uses proprietary communication and power concepts focused on small systems with one animal. Therefore, the University of Applied Sciences Offenburg is developing a low-cost RFID system called muTrans1, which is able to measure ECG, pressure, temperature, oxygen saturation and activity. The muTrans uses an own RFID sensor transponder and standardized commercial components and combines them to a scalable RFID system able to build-up RFID sensor networks with a nearly unlimited size.
RFID- Frontend ISO 15693
(2008)
Cardiac resynchronization therapy (CRT) with biventricular pacing is an established therapy for heart failure (HF) patients (P) with ventricular desynchronization and reduced left ventricular (LV) ejection fraction. The aim of this study was to evaluate electrical right atrial (RA), left atrial (LA), right ventricular (RV) and LV conduction delay with novel telemetric signal averaging electrocardiography (SAECG) in implantable cardioverter defibrillator (ICD) P to better select P for CRT and to improve hemodynamics in cardiac pacing.
Methods: ICD-P (n=8, age 70.8 ± 9.0 years; 2 females, 6 males) with VVI-ICD (n=4), DDD-ICD (n=3) and CRT-ICD (n=1) (Medtronic, Inc., Minneapolis, MN, USA) were analysed with telemetric ECG recording by Medronic programmer 2090, ECG cable 2090AB, PCSU1000 oscilloscope with Pc-Lab2000 software (Velleman®) and novel National Intruments LabView SAECG software.
Results: Electrical RA conduction delay (RACD) was measured between onset and offset of RA deflection in the RAECG. Interatrial conduction delay (IACD) was measured between onset of RA deflection and onset of far-field LA deflection in the RAECG. Interventricular conduction delay (IVCD) was measured between onset of RV deflection in the RVECG and onset of LV deflection in the LVECG. Telemetric SAECG recording was possible in all ICD-P with a mean of 11.7 ± 4.4 SAECG heart beats, 97.6 ± 33.7 ms QRS duration, 81.5 ± 44.6 ms RACD, 62.8 ± 28.4 ms RV conduction delay, 143.7 ± 71.4 ms right cardiac AV delay, 41.5 ms LA conduction delay, 101.6 ms LV conduction delay, 176.8 ms left cardiac AV delay, 53.6 ms IACD and 93 ms IVCD.
Conclusions: Determination of RA, LA, RV and LV conduction delay, IACD, IVCD, right and left cardiac AV delay by telemetric SAECG recording using LabView SAECG technique may be useful parameters of atrial and ventricular desynchronization to improve P selection for CRT and hemodynamics in cardiac pacing.
Spectral analysis of signal averaging electrocardiography in atrial and ventricular tachyarrhythmias
(2017)
Background: Targeting complex fractionated atrial electrograms detected by automated algorithms during ablation of persistent atrial fibrillation has produced conflicting outcomes in previous electrophysiological studies. The aim of the investigation was to evaluate atrial and ventricular high frequency fractionated electrical signals with signal averaging technique.
Methods: Signal averaging electrocardiography (ECG) allows high resolution ECG technique to eliminate interference noise signals in the recorded ECG. The algorithm uses automatic ECG trigger function for signal averaged transthoracic, transesophageal and intracardiac ECG signals with novel LabVIEW software (National Instruments, Austin, Texas, USA). For spectral analysis we used fast fourier transformation in combination with spectro-temporal mapping and wavelet transformation for evaluation of detailed information about the frequency and intensity of high frequency atrial and ventricular signals.
Results: Spectral-temporal mapping and wavelet transformation of the signal averaged ECG allowed the evaluation of high frequency fractionated atrial signals in patients with atrial fibrillation and high frequency ventricular signals in patients with ventricular tachycardia. The analysis in the time domain evaluated fractionated atrial signals at the end of the signal averaged P-wave and fractionated ventricular signals at the end of the QRS complex. The analysis in the frequency domain evaluated high frequency fractionated atrial signals during the P-wave and high frequency fractionated ventricular signals during QRS complex. The combination of analysis in the time and frequency domain allowed the evaluation of fractionated signals during atrial and ventricular conduction.
Conclusions: Spectral analysis of signal averaging electrocardiography with novel LabVIEW software can utilized to evaluate atrial and ventricular conduction delays in patients with atrial fibrillation and ventricular tachycardia. Complex fractionated atrial electrograms may be useful parameters to evaluate electrical cardiac arrhythmogenic signals in atrial fibrillation ablation.
Agile Business Intelligence als Beispiel für ein domänenspezifisch angepasstes Vorgehensmodell
(2016)
Business-Intelligence-Systeme stellen durch ihre Unterstützung bei der Entscheidungsfindung für Unternehmen eine wichtige Rolle dar. Mit einer stetig dynamischeren Unternehmensumwelt geht daher die Anforderung nach der agilen Entwicklung dieser Systeme einher, so dass in der BI-Domäne zunehmend erfolgreich agile Methoden und Vorgehensmodelle eingesetzt werden. Die Weiterentwicklung und Anpassung von BI-Systemen ist dahingehend besonders, dass diese in der Regel langjährig gewachsenen Systemen und Strukturen betreffen, die strengen regulatorischen Rahmenbedingungen unterliegen, was eine Herausforderung für agile Vorgehensweisen darstellt. Wurden die Werte und Prinzipien des agilen Manifests [AM01] und die daraus abgeleiteten Methoden zu Beginn meist eins zu eins auf den Bereich BI übertragen, so hat sich das Verständnis von BI- Agilität als ganzheitliche Eigenschaft der BI im deutschsprachigen Raum etabliert, und agile Me- thoden wurden auf die Besonderheiten der BI-Domäne adaptiert. In diesem Beitrag werden BI-Agilität und Agile BI erläutert, ein Ordnungsrahmen für Maßnahmen zur Steigerung der BI-Agilität eingeführt sowie Herausforderungen bei Agile BI erläutert.
Im Projekt bwLehrpool wurde ein verteiltes System für die flexible Nutzung von Rechnerpools durch Desktop-Virtualisierung entwickelt. Auf Basis eines zentral gebooteten Linux- Grundsystems können beliebige virtualisierbare Betriebssysteme für Lehrund Prüfungszwecke zentral bereitgestellt und lokal auf den Maschinen aus-gewählt werden. Die verschiedenen Ar- beitsumgebungen müssen nicht mehr auf den PCs installiert werden und erlauben so eine multifunktionale Nutzung von PCs und Räumen für vielfältige Lehrund Lernszenarien sowie für elektronische Prüfungen. bwLehrpool abstrahiert von der PC-Hardware vor Ort und ermöglicht den Dozenten die eigene Gestaltung und Verwaltung ihrer Softwareumgebungen als Self-Service. Darüber hinaus fördert bwLehrpool den hochschulübergreifenden Austausch von Kursumgebungen.
In public transportation, the motor pool often consists of various different vehicles bought over a duration of many years. Sometimes, they even differ within one batch bought at the same time. This poses a considerable challenge in the storage and allocation of spare parts, especially in the event of damage to a vehicle. Correctly assigning these parts before the vehicle reaches the workshop could significantly reduce both the downtime and, therefore, the actual costs for companies. In order to achieve this, the current software uses a simple probability calculation. To improve the performance, the data of specific companies was analysed, preprocessed and used with several modelling techniques to classify and, therefore, predict the spare parts to be used in the event of a faulty vehicle. We summarize our experience running through the steps of the Cross Industry Standard Process for Data Mining and compare the performance to the previously used probability. Gradient Boosting Trees turned out to be the best modeling technique for this special case.
This paper describes the use of the single-linkage hierarchical clustering method in outlier detection for manufactured metal work pieces. The main goal of the study is to group defects that occur 5 mm into a work piece from the edge, i.e., the border of the metal work piece. The goal is to remove defects outside the area of interest as outliers. According to the assumptions made for the performance criteria, the single-linkage method has achieved better results compared to other agglomeration methods.
Due to its numerous application fields and benefits, virtualization has become an interesting and attractive topic in computer and mobile systems, as it promises advantages for security and cost efficiency. However, it may bring additional performance overhead. Recently, CPU virtualization has become more popular for embedded platforms, where the performance overhead is especially critical. In this article, we present the measurements of the performance overhead of the two hypervisors Xen and Jailhouse on ARM processors in the context of the heavy load “Cpuburn-a8” application and compare it to a native Linux system running on ARM processors.
In contrast to conventional aortic valve replacement, the Transcatheter Aortic Valve Implantation (TAVI) is a new highly specialist alternative to surgical valve replacement for patients with symptomatic severe aortic stenosis and high operative risk. The procedure was performed in a minimally invasive way and was introduced at the university heart centre, Freiburg – Bad Krozingen in 2008. The results have been getting better and better over the years. The aim of the investigation is the analysis of electrocardiogram conduction time and the electrocardiography changes recorded hours and days after the procedure depending on artificial heart valve models, which may lead to pacemaker implantation, even the analysis of the effectiveness of treatment.
Transcatheter aortiv valve implantation is a new safe strategy treatment for patients with symptomatic severe aortic stenosis and high operative risk. The aim of the study was to compare the pre-and post- muiscatheter aortiv valve implantation procedures to determine the atrioventricuktr conduction time as a potential predictor of permanent pacemaker therapy requirement after transcatheter aortiv valve implantation. The transcatheter aortiv valve implantation patients were divided into groups without pacemaker and with dual or single chamber pacemEtker with diffent atrioventrieular conduction time disturbance before and after transcatheter aortiv valve implantation. In heart failure, patients without permanent pacemaker therapy after transcatheter aortiv valve implantation, atrioventricular conduction time was prolonged after transcatheter aortiv valve implantation. In patients with permanent dual chamber pacemaker therapy after transcatheter aortiv valve implantation, atrioventricular conduction time was normalised with dual chaniber atrioventrieuku pacing mode. Atrioventricular conduction time may be a useful parameter to evaluate the risk of post-procedural atrioventricular conduction block and permanent pacemaker therapy in transcatheter north, valve implantation patients.
In the work at hand, we combine a Private Information Retrieval (PIR) protocol with Somewhat Homomorphic Encryption (SHE) and use Searchable Encryption (SE) with the objective to provide security and confidentiality features for a third party cloud security audit. During the auditing process, a third party auditor will act on behalf of a cloud service user to validate the security requirements performed by a cloud service provider. Our concrete contribution consists of developing a PIR protocol which is proceeding directly on a log database of encrypted data and allowing to retrieve a sum or a product of multiple encrypted elements. Subsequently, we concretely apply our new form of PIR protocol to a cloud audit use case where searchable encryption is employed to allow additional confidentiality requirements to the privacy of the user. Exemplarily we are considering and evaluating an audit of client accesses to a controlled resource provided by a cloud service provider.
Today's network landscape consists of many different network technologies, a wide range of end-devices with a large scale of capabilities and power, and an immense quantity of information and data represented in different formats. Research on 3D imaging, virtual reality and holographic techniques will result in new user interfaces (UI) for mobile devices and will increase their diversity and variety. In this paper software architecture has been proposed to establish device and content format independent communication, implemented in Language Learning Game (LLG).