Fakultät Elektrotechnik, Medizintechnik und Informatik (EMI) (ab 04/2019)
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Enabling ultra-low latency is one of the major drivers for the development of 5G cellular networks to support delay sensitive applications including factory automation, autonomous vehicles and tactile internet. Long Term Evolution for Machines (LTE-M) is a 3rd Generation Partnership Project (3GPP) Release 13 standardized cellular network currently optimized for Ultra-Reliable Low Latency Communication (URLLC). To reduce the latency in cellular networks, 3GPP has proposed a few latency reduction techniques that include Semi-Persistent Scheduling (SPS) and short Transmission Time Interval (sTTI). The ivESK institute is actively working on these proposals to support low latency applications with cellular networks. This artical describes these latency reduction techniques that are developed as an extention to an open source network simulator (ns-3). The results from the simulations are also presented and discussed.
Изобретение относится к области связи. Технический результат – упрощение синхронизации сетевых узлов в беспроводной сети, реализованных на экономичных аппаратных средствах, сохраняя точную синхронизацию. Для этого предусмотрены следующие шаги: принимается кадр синхронизации и определяется метка времени синхронизации ТАP; с помощью часов IWC, содержащихся в IWC, генерируется метка времени ТB, определяющая время приема кадра синхронизации; создается изменение потенциала на порте IWC, являющееся событием синхронизации; с помощью часов IWC генерируется временная метка TSE, определяющая момент события синхронизации; и SED определяет событие синхронизации посредством анализа временной длительности изменения потенциала порта IWC и генерирует метку времени TS, используя синхронизированный сигнал времени TCCG, где TS определяет то же самое время события синхронизации, что и TSE. ТAP, ТB, TSE и TS, определяемые посредством обработки одного или нескольких кадров события синхронизации, затем используются для синхронизации синхронизированного сигнала времени TCCG, генерируемого системой CCG, с сигналом времени ведущего устройства.
Many different methods, such as screen printing, gravure, flexography, inkjet etc., have been employed to print electronic devices. Depending on the type and performance of the devices, processing is done at low or high temperature using precursor- or particle-based inks. As a result of the processing details, devices can be fabricated on flexible or non-flexible substrates, depending on their temperature stability. Furthermore, in order to reduce the operating voltage, printed devices rely on high-capacitance electrolytes rather than on dielectrics. The printing resolution and speed are two of the major challenging parameters for printed electronics. High-resolution printing produces small-size printed devices and high-integration densities with minimum materials consumption. However, most printing methods have resolutions between 20 and 50 μm. Printing resolutions close to 1 μm have also been achieved with optimized process conditions and better printing technology.
The final physical dimensions of the devices pose severe limitations on their performance. For example, the channel lengths being of this dimension affect the operating frequency of the thin-film transistors (TFTs), which is inversely proportional to the square of channel length. Consequently, short channels are favorable not only for high-frequency applications but also for high-density integration. The need to reduce this dimension to substantially smaller sizes than those possible with today’s printers can be fulfilled either by developing alternative printing or stamping techniques, or alternative transistor geometries. The development of a polymer pen lithography technique allows scaling up parallel printing of a large number of devices in one step, including the successive printing of different materials. The introduction of an alternative transistor geometry, namely the vertical Field Effect Transistor (vFET), is based on the idea to use the film thickness as the channel length, instead of the lateral dimensions of the printed structure, thus reducing the channel length by orders of magnitude. The improvements in printing technologies and the possibilities offered by nanotechnological approaches can result in unprecedented opportunities for the Internet of Things (IoT) and many other applications. The vision of printing functional materials, and not only colors as in conventional paper printing, is attractive to many researchers and industries because of the added opportunities when using flexible substrates such as polymers and textiles. Additionally, the reduction of costs opens new markets. The range of processing techniques covers laterally-structured and large-area printing technologies, thermal, laser and UV-annealing, as well as bonding techniques, etc. Materials, such as conducting, semiconducting, dielectric and sensing materials, rigid and flexible substrates, protective coating, organic, inorganic and polymeric substances, energy conversion and energy storage materials constitute an enormous challenge in their integration into complex devices.
Learning to Walk With Toes
(2020)
This paper explains how a model-free (with respect to the robot model and the behavior to learn) approach can facilitate learning to walk from scratch. It is applied to a simulated Nao robot with toes. Results show an improvement of 30% in speed compared to a model without toes and also compared to our model-based approach, but with less stability.