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The communication between objects, i.e. between cars (car-2-car, C2C), between cars and infrastructure (car-2-infrastructure, C2I) and between cars and vulnerable road users (car-2-VRU, C2VRU) is a major stepping stone towards traffic applications to enable efficient and safe traffic flow. However, these applications pose very high requirements to the communication protocols, which go beyond the capabilities of an available standardized solution.
This contribution shows how iterative design processes can help to fulfill these requirements, while re-using a maximum of elements from one level to the next and thus avoiding unrealistic overhead. In especially, the added value of simulation and emulation in this iterative process is elaborated.
The research project Ko-TAG [2], as part of the research initiative Ko-FAS [1], funded by the German Ministry of Economics and Technologies (BMWi), deals with the development of a wireless cooperative sensor system that shall pro-vide a benefit to current driver assistance systems (DAS) and traffic safety applications (TSA). The system’s primary function is the localization of vulnerable road users (VRU) e.g. pedestrians and powered two-wheelers, using communication signals, but can also serve as pre-crash (surround) safety system among vehicles. The main difference of this project, compared to previous ones that dealt with this topic, e.g. the AMULETT project, is an underlying FPGA based Hardware-Software co-design. The platform drives a real-time capable communication protocol that enables highly scalable network topologies fulfilling the hard real-time requirements of the single localization processes. Additionally it allows the exchange of further data (e.g. sensor data) to support the accident pre-diction process and the channel arbitration, and thus supports true cooperative sensing. This paper gives an overview of the project’s current system design as well as of the implementations of the key HDL entities supporting the software parts of the communication protocol. Furthermore, an approach for the dynamic reconfiguration of the devices is described, which provides several topology setups using a single PCB design.