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Printed electronics offers certain technological advantages over its silicon based counterparts, such as mechanical flexibility, low process temperatures, maskless and additive manufacturing process, leading to extremely low cost manufacturing. However, to be exploited in applications such as smart sensors, Internet of Things and wearables, it is essential that the printed devices operate at low supply voltages. Electrolyte gated field effect transistors (EGFETs) using solution-processed inorganic materials which are fully printed using inkjet printers at low temperatures are very promising candidates to provide such solutions. In this paper, we discuss the technology, process, modeling, fabrication, and design aspect of circuits based on EGFETs. We show how the measurements performed in the lab can accurately be modeled in order to be integrated in the design automation tool flow in the form of a Process Design Kit (PDK). We also review some of the remaining challenges in this technology and discuss our future directions to address them.
Printed Electronics (PE) is a promising technology that provides mechanical flexibility and low-cost fabrication. These features make PE the key enabler for emerging applications, such as smart sensors, wearables, and Internet of Things (IoTs). Since these applications need secure communication and/or authentication, it is vital to utilize security primitives for cryptographic key and identification. Physical Unclonable Functions (PUF) have been adopted widely to provide the secure keys. In this work, we present a weak PUF based on Electrolyte-gated FETs using inorganic inkjet printed electronics. A comprehensive analysis framework including Monte Carlo simulations based on real device measurements is developed to evaluate the proposed PE-PUF. Moreover, a multi-bit PE-PUF design is proposed to optimize area usage. The analysis results show that the PE-PUF has ideal uniqueness, good reliability, and can operates at low voltage which is critical for low-power PE applications. In addition, the proposed multi-bit PE-PUF reduces the area usage around 30%.
Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.
A printed electronics technology has the advantage of additive and extremely low-cost fabrication compared with the conventional silicon technology. Specifically, printed electrolyte-gated field-effect transistors (EGFETs) are attractive for low-cost applications in the Internet-of-Things domain as they can operate at low supply voltages. In this paper, we propose an empirical dc model for EGFETs, which can describe the behavior of the EGFETs smoothly and accurately over all regimes. The proposed model, built by extending the Enz-Krummenacher-Vittoz model, can also be used to model process variations, which was not possible previously due to fixed parameters for near threshold regime. It offers a single model for all the operating regions of the transistors with only one equation for the drain current. Additionally, it models the transistors with a less number of parameters but higher accuracy compared with existing techniques. Measurement results from several fabricated EGFETs confirm that the proposed model can predict the I-V more accurately compared with the state-of-the-art models in all operating regions. Additionally, the measurements on the frequency of a fabricated ring oscillator are only 4.7% different from the simulation results based on the proposed model using values for the switching capacitances extracted from measurement data, which shows more than 2× improvement compared with the state-of-the-art model.
Uncontrollable manufacturing variations in electrical hardware circuits can be exploited as Physical Unclonable Functions (PUFs). Herein, we present a Printed Electronics (PE)-based PUF system architecture. Our proposed Differential Circuit PUF (DiffC-PUF) is a hybrid system, combining silicon-based and PE-based electronic circuits. The novel approach of the DiffC-PUF architecture is to provide a specially designed real hardware system architecture, that enables the automatic readout of interchangeable printed DiffC-PUF core circuits. The silicon-based addressing and evaluation circuit supplies and controls the printed PUF core and ensures seamless integration into silicon-based smart systems. Major objectives of our work are interconnected applications for the Internet of Things (IoT).